SeqPGA.cpp

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//------------------------------------------------------------------------------
//
//  Package    : SeqPGA
//
//  Description:
//
//  Author(s)  : F. Machefert -
//  Date       : 10 February 2004
//
//------------------------------------------------------------------------------
#include <iostream>
#include <sstream>
#include <fstream>

// include files
#ifndef WIN32
#include <unistd.h>
#endif
#include <algorithm>

// local include file
#include "SeqPGA.h"


//=============================================================================
// Standard constructor, initializes variables
//=============================================================================

SeqPGA::SeqPGA(){
  setType("SeqPGA");
  setId(0);
  add(Attrib::ELEMENT); add (Attrib::HARDWARE);
  debug("SeqPGA built.","SeqPGA::SeqPGA");
  
  m_usb = new UsbFTMLInterface();
  m_usb->setName("Usb");
  addChild(m_usb);
  
  m_usbi2c=new UsbMLI2cBus();
  m_usbi2c->setName("UsbI2c");
  m_usb->addChild(m_usbi2c);
  
  m_usbspi=new UsbMLSpiBus();
  m_usbspi->setName("UsbSpi");
  m_usb->addChild(m_usbspi);
  
  m_reg=new Register();
  m_reg->io()->defDataU8(2);
  m_reg->setName("UsbTestReg");
  m_reg->setAddress(11);
  m_usb->addChild(m_reg);
   
  m_statusReg       = new Register();
  m_statusReg       ->setName("StatusReg");
  m_statusReg       ->io()->defDataU8(2);
  m_statusReg       ->io()->setAddress(7);
  m_statusReg       ->io()->setWordSize(IOdata::Byte);
  m_usb            ->addChild(m_statusReg);

  m_setupReg       = new Register();
  m_setupReg       ->setName("SetupReg");
  m_setupReg       ->io()->defDataU8(2);
  m_setupReg       ->io()->setAddress(8);
  m_setupReg       ->io()->setWordSize(IOdata::Byte);
  m_usb            ->addChild(m_setupReg);

  m_resetReg       = new Register();
  m_resetReg       ->setName("ResetReg");
  m_resetReg       ->io()->defDataU8(2);
  m_resetReg       ->io()->setAddress(14);
  m_resetReg       ->io()->setWordSize(IOdata::Byte);
  m_usb            ->addChild(m_resetReg);

  m_testSeqReg     = new Register();
  m_testSeqReg     ->setName("TestSeqReg");
  m_testSeqReg     ->io()->defDataU8(2);
  m_testSeqReg     ->io()->setAddress(12);
  m_testSeqReg     ->io()->setWordSize(IOdata::Byte);
  m_usb            ->addChild(m_testSeqReg);

  m_txSpiFifo         = new RAM();
  m_rxSpiFifo         = new RAM();
  m_addSpiReg         = new Register();
  m_ctrlSpiReg        = new Register();
  //  m_subAddSpiReg      = new Register();
  m_transmitSpiReg    = new Register();
  
  m_txSpiFifo       ->setName("TxSpiFifo");
  m_rxSpiFifo       ->setName("RxSpiFifo");
  m_addSpiReg       ->setName("AddSpiReg");
  m_ctrlSpiReg      ->setName("CtrlSpiReg");
  //  m_subAddSpiReg    ->setName("SubAddSpiReg");
  m_transmitSpiReg  ->setName("TransmitSpiReg");
  
  m_txSpiFifo       ->setSize(16,2);
  m_rxSpiFifo       ->setSize(16,1);
  m_addSpiReg       ->io()->defDataU8(2);
  m_ctrlSpiReg      ->io()->defDataU8(2);
  //  m_subAddSpiReg    ->io()->defDataU8(2);
  m_transmitSpiReg  ->io()->defDataU8(2);
  
  m_txSpiFifo       ->io()->setAddress(2);
  m_rxSpiFifo       ->io()->setAddress(4);
  m_addSpiReg       ->io()->setAddress(6);
  m_ctrlSpiReg      ->io()->setAddress(5);
  //  m_subAddSpiReg    ->io()->setAddress(3);
  m_transmitSpiReg  ->io()->setAddress(10);
  
  m_addSpiReg       ->io()->setWordSize(IOdata::Byte);
  m_ctrlSpiReg      ->io()->setWordSize(IOdata::Byte);
  //  m_subAddSpiReg    ->io()->setWordSize(IOdata::Byte);
  m_transmitSpiReg  ->io()->setWordSize(IOdata::Byte);
  
  m_usb->addChild(m_txSpiFifo);  
  m_usb->addChild(m_rxSpiFifo);     
  m_usb->addChild(m_addSpiReg);     
  m_usb->addChild(m_ctrlSpiReg);     
  //  m_usb->addChild(m_subAddSpiReg);   
  m_usb->addChild(m_transmitSpiReg);

  m_masterI2cReg    = new Register();
  m_masterI2cReg    ->setName("I2cMasterI2cReg");
  m_masterI2cReg    ->io()->defDataU8(3);
  m_masterI2cReg    ->io()->setAddress(9);
  m_masterI2cReg    ->io()->setWordSize(IOdata::Byte);

  m_addI2cReg       = new Register();
  m_addI2cReg       ->setName("AddI2cReg");
  m_addI2cReg       ->io()->defDataU8(2);
  m_addI2cReg       ->io()->setAddress(1);
  m_addI2cReg       ->io()->setWordSize(IOdata::Byte);

  m_usb->addChild(m_masterI2cReg);  
  m_usb->addChild(m_addI2cReg);     

}

//=============================================================================
//
//=============================================================================

StatusCode SeqPGA::setExtTrig( bool value ){
  m_setupReg->read();
  unsigned int data=m_setupReg->io()->dataU8()[0];
  if (value) data |=  8 ;
  else       data &= ~8 ;
  m_setupReg->io()->setU8(0,data);
  return m_setupReg->write();
}

bool SeqPGA::extTrig( ){
  m_setupReg->read();
  /*
    if (StatusCode::SUCCESS == m_setupReg->read()) {
    error("I2c register setupReg error", "UsbMLI2cBus::spiGBTSCA");
    return false;
    }*/
  return ( ( m_setupReg->io()->dataU8(0) >> 3 ) & 1 ) ;
}

//=============================================================================
//
//=============================================================================

StatusCode SeqPGA::setSpiGBTSCA( bool value ){
  m_setupReg->read();
  unsigned int data=m_setupReg->io()->dataU8()[0];
  if (!value) data |=  2 ;
  else        data &= ~2 ;
  m_setupReg->io()->setU8(0,data);
  return m_setupReg->write();
}

bool SeqPGA::spiGBTSCA( ){
  m_setupReg->read();
  /*
    if (StatusCode::SUCCESS == m_setupReg->read()) {
    error("I2c register setupReg error", "UsbMLI2cBus::spiGBTSCA");
    return false;
    }*/
  return (! ( m_setupReg->io()->dataU8(0) & 2 ) ) ;
}

//=============================================================================
//
//=============================================================================

StatusCode SeqPGA::setSpiEnable( bool value ){
  m_setupReg->read();
  unsigned int data=m_setupReg->io()->dataU8()[1];
  if (value)  data |=  4 ;
  else        data &= ~4 ;
  m_setupReg->io()->setU8(1,data);
  return m_setupReg->write();
}

bool SeqPGA::spiEnable( ){
  m_setupReg->read();
  return ( ( ( m_setupReg->io()->dataU8(1) )>> 2 ) & 1 ) ;
}

//=============================================================================
//
//=============================================================================

StatusCode SeqPGA::setLedEnable( bool value ){
  m_setupReg->read();
  unsigned int data=m_setupReg->io()->dataU8()[1];
  if (value)  data |=  8 ;
  else        data &= ~8 ;
  m_setupReg->io()->setU8(1,data);
  return m_setupReg->write();
}

bool SeqPGA::ledEnable( ){
  m_setupReg->read();
  return ( ( ( m_setupReg->io()->dataU8(1) )>> 3 ) & 1 ) ;
}

//=============================================================================
//
//=============================================================================
/*
StatusCode SeqPGA::setSpiDataTx( unsigned long int value ){
  m_txSpiReg->io()->setU8(0,value&0xFF);
  m_txSpiReg->io()->setU8(1,(value>>8)& 0xFF);
  return m_txSpiReg->write();
}

unsigned long int SeqPGA::spiDataTx(){
  m_txSpiReg->read();
  return ( m_txSpiReg->io()->dataU8(0) + (m_txSpiReg->io()->dataU8(1)<<8) ) ;
}
*/
//=============================================================================
//
//=============================================================================
/*
StatusCode SeqPGA::setSpiDataRx( unsigned long int value ){
  m_rxSpiReg->io()->setU8(0,value&0xFF);
  m_rxSpiReg->io()->setU8(1,(value>>8) & 0xFF);
  return m_rxSpiReg->write();
}

unsigned long int SeqPGA::spiDataRx(){
  m_rxSpiReg->read();
  //  m_rxSpiReg->io()->dump(0);
  return ( m_rxSpiReg->io()->dataU8(0) + (m_rxSpiReg->io()->dataU8(1)<<8) ) ;
}
*/
//=============================================================================
//
//=============================================================================

StatusCode SeqPGA::setSpiAdd( unsigned long int value ){
  m_addSpiReg->io()->setU8(0,value&0xFF);
  m_addSpiReg->io()->setU8(1,(value>>8) & 0xFF);
  StatusCode err= m_addSpiReg->write();
 
  return err;
}

unsigned long int SeqPGA::spiAdd(){
  m_addSpiReg->read();
  /*
    if (StatusCode::SUCCESS == m_txSpiReg->read()) {
    error("TX register txSpiReg error", "UsbMLSpiBus::dataTx");
    return false;
    }
  */
  return ( m_addSpiReg->io()->dataU8(0) + (m_addSpiReg->io()->dataU8(1)<<8) ) ;
}

//=============================================================================
//
//=============================================================================
  
StatusCode SeqPGA::setSpiSubAdd( unsigned long int value ){
  m_spiSubAdd = value & 0x7F;
}

unsigned long int SeqPGA::spiSubAdd(){
  return ( m_spiSubAdd ) ;
}

//=============================================================================
//
//=============================================================================
/*  
StatusCode SeqPGA::spiRead( ){
  unsigned int val = m_subAddSpiReg->io()->dataU8(0);
  val |= 0x80;
  m_subAddSpiReg->io()->setU8(0,val);
  m_subAddSpiReg->io()->setU8(1,0);
  m_subAddSpiReg->write();
  //m_subAddSpiReg->io()->dump(0);
  return m_transmitSpiReg->write();
}
*/

/*
StatusCode SeqPGA::spiWrite(){
  unsigned int val = m_subAddSpiReg->io()->dataU8(0);
  val &= 0x7F;
  m_subAddSpiReg->io()->setU8(0,val);
  m_subAddSpiReg->io()->setU8(1,0);
  m_subAddSpiReg->write();
  //  m_subAddSpiReg->io()->dump(0);
  return m_transmitSpiReg->write();
}
*/

/*
unsigned long int SeqPGA::spiRead (unsigned long int subadd) { 
  setSpiSubAdd(subadd); 
  spiRead(); 
  return spiDataRx(); 
} 
*/

StatusCode SeqPGA::spiWrite(unsigned int subadd, unsigned int nwords, unsigned int *values){
  unsigned int val = subadd & 0x7F; 
  m_txSpiFifo->setSize(16,nwords+1);
  m_ctrlSpiReg->io()->setU8(0,nwords&0xFF);
  m_ctrlSpiReg->io()->setU8(1,(nwords>>8)&0xFF);
  m_ctrlSpiReg->write();
  m_txSpiFifo->io()->setU8(0,val);
  m_txSpiFifo->io()->setU8(1,0);
  for (int w=0; w<nwords; ++w) {
    m_txSpiFifo->io()->setU8(2*w+2,values[w]&0xFF);
    m_txSpiFifo->io()->setU8(2*w+3,(values[w]>>8)&0xFF);
  }
  m_txSpiFifo->write();
  return m_transmitSpiReg->write();
}

StatusCode SeqPGA::spiRead (unsigned int subadd, unsigned int nwords, unsigned int *values) { 
  unsigned int val = subadd | 0x80 ; 
  m_txSpiFifo->setSize(16,1);
  m_rxSpiFifo->setSize(16,nwords+1);
  m_ctrlSpiReg->io()->setU8(0,(nwords+1)&0xFF);
  m_ctrlSpiReg->io()->setU8(1,((nwords+1)>>8)&0xFF);
  m_ctrlSpiReg->write();
  m_txSpiFifo->io()->setU8(0,val);
  m_txSpiFifo->io()->setU8(1,0);
  m_txSpiFifo->write();
  StatusCode status = m_transmitSpiReg->write();  
  //  usleep(100000);
  m_rxSpiFifo->read();
  for (int w=0; w<nwords; ++w) {
    values[w]=((m_rxSpiFifo->io()->dataU8(2*w+2))&0xFF)+
      (((m_rxSpiFifo->io()->dataU8(2*w+3))&0xFF)<<8);
  }
  return status;
}

StatusCode SeqPGA::spiWrite(unsigned int subadd, unsigned int nwords, PyObject* value){
  unsigned int val = subadd & 0x7F; 
  m_txSpiFifo->setSize(16,nwords+1);
  m_ctrlSpiReg->io()->setU8(0,nwords&0xFF);
  m_ctrlSpiReg->io()->setU8(1,(nwords>>8)&0xFF);
  m_ctrlSpiReg->write();
  //  m_ctrlSpiReg->read();
  //  m_ctrlSpiReg->dump();
  m_txSpiFifo->io()->setU8(0,val);
  m_txSpiFifo->io()->setU8(1,0);
  for (int w=0; w<nwords; ++w) {
    val = PyInt_AsLong(PyList_GetItem(value,w));
    m_txSpiFifo->io()->setU8(2*w+2,val&0xFF);
    m_txSpiFifo->io()->setU8(2*w+3,(val>>8)&0xFF);
  }
  //  m_txSpiFifo->dump();
  m_txSpiFifo->write();
  return m_transmitSpiReg->write();
}

PyObject* SeqPGA::spiRead (unsigned int subadd, unsigned int nwords) { 
  unsigned int val = subadd | 0x80 ; 
  m_txSpiFifo->setSize(16,1);
  m_rxSpiFifo->setSize(16,nwords+1);
  m_ctrlSpiReg->io()->setU8(0,(nwords+1)&0xFF);
  m_ctrlSpiReg->io()->setU8(1,((nwords+1)>>8)&0xFF);
  m_ctrlSpiReg->write();
  //  m_ctrlSpiReg->read();
  //  m_ctrlSpiReg->dump();
  m_txSpiFifo->io()->setU8(0,val);
  m_txSpiFifo->io()->setU8(1,0);
  m_txSpiFifo->write();
  StatusCode status = m_transmitSpiReg->write();  
  //  usleep(100000);
  m_rxSpiFifo->read();
  PyObject* values = PyList_New(0);
  for (int w=0; w<nwords; ++w) {
    //    m_rxSpiFifo->dump();
   PyList_Append(values,
          PyInt_FromLong( (long int) (
                          ((m_rxSpiFifo->io()->dataU8(2*w+2))&0xFF) + 
                          (((m_rxSpiFifo->io()->dataU8(2*w+3))&0xFF)<<8)
                          )));
  }
  return values;
} 

StatusCode SeqPGA::spiWrite(unsigned int subadd, unsigned int value){
  unsigned int val = subadd & 0x7F; 
  m_txSpiFifo->setSize(16,2);
  m_ctrlSpiReg->io()->setU8(0,1);
  m_ctrlSpiReg->io()->setU8(1,0);
  m_ctrlSpiReg->write();
  //  m_ctrlSpiReg->read();
  m_txSpiFifo->io()->setU8(0,val);
  m_txSpiFifo->io()->setU8(1,0);
  m_txSpiFifo->io()->setU8(2,value&0xFF);
  m_txSpiFifo->io()->setU8(3,(value>>8)&0xFF);
  m_txSpiFifo->write();
  //  m_txSpiFifo->dump();
  return m_transmitSpiReg->write();
}

unsigned int SeqPGA::spiRead (unsigned int subadd){
  unsigned int val = subadd | 0x80 ; 
  m_txSpiFifo->setSize(16,1);
  m_rxSpiFifo->setSize(16,1);
  m_ctrlSpiReg->io()->setU8(0,1);
  m_ctrlSpiReg->io()->setU8(1,0);
  m_ctrlSpiReg->write();
  m_txSpiFifo->io()->setU8(0,val);
  m_txSpiFifo->io()->setU8(1,0);
  m_txSpiFifo->write();
  //  m_txSpiFifo->dump();
  StatusCode status = m_transmitSpiReg->write();  
  m_rxSpiFifo->read();
  //  m_rxSpiFifo->dump();
  //usleep(50);
  return   ((m_rxSpiFifo->io()->dataU8(0))&0xFF) + (((m_rxSpiFifo->io()->dataU8(1))&0xFF)<<8);
} 

//=============================================================================
//
//=============================================================================

StatusCode SeqPGA::setI2cGBTSCA( bool value ){
  m_setupReg->read();
  unsigned int data=m_setupReg->io()->dataU8()[0];
  if (!value) data |= 1  ;
  else        data &= ~1 ;
  m_setupReg->io()->setU8(0,data);
  return m_setupReg->write();
}

bool SeqPGA::i2cGBTSCA( ){
  m_setupReg->read();
  return (! ( m_setupReg->io()->dataU8(0) & 1 ) ) ;
}

//=============================================================================
//
//=============================================================================

StatusCode SeqPGA::setI2cBuffer( unsigned long int value ){
  m_i2cBuffer = value;
  return StatusCode::SUCCESS;
}

unsigned long int SeqPGA::i2cBuffer(){
  return m_i2cBuffer;
}

//=============================================================================
//
//=============================================================================

unsigned long int SeqPGA::i2cData(){
  //  m_masterI2cReg->io()->dump(0);
  return ( ((m_masterI2cReg->io()->dataU8(0))&0xFF) ) ;
}

//=============================================================================
//
//=============================================================================

StatusCode SeqPGA::setI2cAdd( unsigned long int value ){
  m_addI2cReg->io()->setU8(0,value&0xFF);
  m_addI2cReg->io()->setU8(1,(value&0xFF00)>>8);
  return m_addI2cReg->write();
}

unsigned long int SeqPGA::i2cAdd(){
  m_addI2cReg->read();
  return ( m_addI2cReg->io()->dataU8(0) + (m_addI2cReg->io()->dataU8(1)<<8) ) ;
}

//=============================================================================
//
//=============================================================================

StatusCode SeqPGA::setI2cSubAdd( unsigned long int value ){
  m_i2cSubAdd = value;
  return StatusCode::SUCCESS;
}

unsigned long int SeqPGA::i2cSubAdd(){
  return m_i2cSubAdd; 
}
  
//=============================================================================
//
//=============================================================================

StatusCode SeqPGA::i2cRead( ){
  debug("setting position of read i2c protocol","i2c read");
  m_setupReg->read();
  unsigned int data = m_setupReg->io()->dataU8()[0];
  data |= (1 << 2)  ;     
  m_setupReg->io()->setU8(0,data);
  m_setupReg->write();
    
  debug("setting subadd value in the frame","i2c write");
  m_masterI2cReg->io()->defDataU8(2);
  m_masterI2cReg->io()->setU8(0,m_i2cSubAdd&0xFF);
  m_masterI2cReg->io()->setU8(1,(m_i2cSubAdd>>8)&0xFF);
  //  m_masterI2cReg->io()->dump(0);

  debug("i2c write of the register","i2c read");
  m_masterI2cReg->write();

  debug("i2c read of the addressed register","i2c read");
  m_masterI2cReg->io()->defDataU8(1);
  m_masterI2cReg->read();
  //  m_masterI2cReg->io()->dump(0);

  return StatusCode::SUCCESS;
}

StatusCode SeqPGA::i2cWrite(){
  debug("setting position of write i2c protocol","i2c write");
  m_setupReg->read();
  unsigned int data = m_setupReg->io()->dataU8()[0];
  data &= ~(1 << 2)  ; 
  m_setupReg->io()->setU8(0,data);
  m_setupReg->write();

  debug("setting subadd value in the frame","i2c write");
  m_masterI2cReg->io()->defDataU8(3);
  m_masterI2cReg->io()->setU8(0,m_i2cSubAdd&0xFF);
  m_masterI2cReg->io()->setU8(1,(m_i2cSubAdd>>8)&0xFF);

  debug("setting buffer value in the frame","i2c write");
  m_masterI2cReg->io()->setU8(2,m_i2cBuffer&0xFF);
  //  m_masterI2cReg->io()->dump(0);

  debug("i2c write","i2c write");
  return m_masterI2cReg->write();
}

unsigned long int SeqPGA::i2cRead(unsigned long int subadd){
  setI2cSubAdd(subadd);
  i2cRead();
  return i2cData();
}

StatusCode SeqPGA::i2cWrite(unsigned long int subadd, unsigned long int value){
  setI2cSubAdd(subadd);
  setI2cBuffer(value);
  return i2cWrite();
}