10 #include "Acquisition.h" 17 #include <boost/python.hpp> 18 #include <boost/python/suite/indexing/vector_indexing_suite.hpp> 24 class_<A3PE, bases <Element> >(
"A3PE")
25 .def(
"ctrlReg" ,&
A3PE::ctrlReg,return_value_policy<reference_existing_object>())
26 .def(
"resetReg" ,&
A3PE::resetReg,return_value_policy<reference_existing_object>())
27 .def(
"setupReg" ,&
A3PE::setupReg,return_value_policy<reference_existing_object>())
28 .def(
"statusReg" ,&
A3PE::statusReg,return_value_policy<reference_existing_object>())
29 .def(
"acqReg" ,&
A3PE::acqReg,return_value_policy<reference_existing_object>())
30 .def(
"latencyReg" ,&
A3PE::acqReg,return_value_policy<reference_existing_object>())
34 .def(
"triggerReg" ,&
A3PE::triggerReg,return_value_policy<reference_existing_object>())
35 .def(
"toAXReg" ,&
A3PE::toAXReg,return_value_policy<reference_existing_object>())
36 .def(
"fromAXReg" ,&
A3PE::fromAXReg,return_value_policy<reference_existing_object>())
37 .def(
"spare3Reg" ,&
A3PE::spare3Reg,return_value_policy<reference_existing_object>())
38 .def(
"storageRam" ,&
A3PE::storageRam,return_value_policy<reference_existing_object>())
39 .def(
"patternRam" ,&
A3PE::patternRam,return_value_policy<reference_existing_object>())
40 .def(
"triggerRam" ,&
A3PE::triggerRam,return_value_policy<reference_existing_object>())
41 .def(
"toAXRam" ,&
A3PE::toAXRam,return_value_policy<reference_existing_object>())
42 .def(
"fromAXRam" ,&
A3PE::fromAXRam,return_value_policy<reference_existing_object>())
43 .def(
"testRam" ,&
A3PE::testRam,return_value_policy<reference_existing_object>())
110 class_<Proto40MHz_v1, bases <Element> >(
"Proto40MHz_v1")
118 class_<Acquisition,bases <Processus> >(
"Acquisition")
146 class_<A3PE_BitFlip,bases <Processus> >(
"A3PE_BitFlip")
154 enum_<UsbFTInterface::WordSize>(
"WordSize")
165 class_<UsbFTInterface, bases <Element> > (
"UsbFTInterface")
182 .def(
"write" ,write_1)
183 .def(
"write" ,write_2)
188 class_<UsbFTInterfaceTest, bases<Processus> > (
"UsbFTInterfaceTest")
195 class_<RegisterTest, bases<Processus> > (
"RegisterTest")
StatusCode setParam(int size, double mean, double sigma)
StatusCode setChannels(unsigned int)
virtual StatusCode finalize()
Register * ctrlAnaMezzReg()
StatusCode setNTrigger(unsigned int)
bool readTriggerFifoUsb()
StatusCode setTriggerRate(unsigned int)
void setTimeOut(int txTimeOut, int rxTimeOut)
bool readPatternFifoUsb()
StatusCode setReadToAXRamUsb(bool)
unsigned int triggerRate()
StatusCode setSoftwareTrigger(bool)
StatusCode setReadPatternFifoUsb(bool)
unsigned int clockDivision()
StatusCode setAddToAXRam(int)
void setBuffer(int txBuffer, int rxBuffer)
StatusCode resetLatencyCounter()
StatusCode resetUsbPhasers()
StatusCode setFifoDepth(unsigned int)
StatusCode resetSequenceFromToAX()
void loadToAX(std::string)
void setMaxRange(float maxrange)
void loadTrigger(std::string)
StatusCode setTrigger(bool trig)
bool writeStorageFifoUsb()
virtual StatusCode execute()
StatusCode startSequenceAX()
void setMinRange(float minrange)
StatusCode read(IOdata *)
virtual StatusCode execute()
void setSerialNum(std::string serialNum)
BOOST_PYTHON_MODULE(libCatBcn)
unsigned int triggerDelay()
StatusCode setLatencyAX(unsigned int)
StatusCode setTriggerDelay(unsigned int)
StatusCode setPipeline(unsigned int)
StatusCode resetStorageFifo()
StatusCode resetPatternFifo()
StatusCode setFifoLatency(unsigned short)
void loadStorage(std::string)
virtual StatusCode initialize()
StatusCode setAddFromAXRam(int)
StatusCode setReadTriggerFifoUsb(bool)
void loadFromAX(std::string)
StatusCode enableStorage()
void setLatencyTimer(unsigned char latencyTimer)
void setSample(int nsample)
StatusCode write(IOdata *)
void setDeviceDesc(std::string deviceDesc)
void setStoreTree(bool store_tree)
StatusCode setWriteStorageFifoUsb(bool)
void setWordSize(unsigned long wordSize)
virtual StatusCode finalize()
StatusCode resetTriggerFifo()
StatusCode resetToAXRam()
StatusCode resetFromAXRam()
StatusCode setInternalAXSequence(bool)
StatusCode setClockDivision(unsigned int)
StatusCode setEnableADC(unsigned int, bool)
unsigned char latencyTimer()
virtual StatusCode init()
bool internalAXSequence()
StatusCode setDepth(unsigned int)
unsigned int fifoLatency()
void setStoreSample(bool store_sample)
Register * writeLengthFifoReg()
void setDeadTime(int deadtime)
StatusCode setFile(std::string filename)
void setStoreTrend(bool store_hist)
StatusCode setLengthAX(unsigned int)
virtual StatusCode initialize()
StatusCode setWriteFromAXRamUsb(bool)
void loadPattern(std::string)
Register * clockDivisionReg()
bool enableADC(unsigned int)
StatusCode setAddress(long int address)