FePGA.h

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//$Id: FePGA.h,v 1.3 2006/09/28 13:02:23 fmachefe Exp $
//------------------------------------------------------------------------------
//
//  Package    : FePGA
//
//  Description:
//
//  Author(s)  : F. Machefert - Yasmine Amhis
//  Date       : 10 February 2004 -- Modified 09-2017
//
//------------------------------------------------------------------------------

#ifndef __FEPGA_H_
#define __FEPGA_H_

#include "Element.h"
#include "RAM.h"
#include "Register.h"
#include "UsbFTMLInterface.h"
#include "UsbMLI2cBus.h"
#include "UsbMLSpiBus.h"

class FePGA : public Element {
public:
  typedef unsigned long  U32;
  typedef unsigned short U16;
  typedef unsigned char  U8;

  FePGA();
  
  virtual ~FePGA() {}; 

  void help() { info("FePGA "+name()+". No help.","FePGA::help"); };

  StatusCode init() {
    return StatusCode::SUCCESS;
  };

  void reset() {
    info("FePGA reset.");
    m_resetReg->io()->setU8(0,1);
    m_resetReg->io()->setU8(1,0);
    m_resetReg->write();
  };



  void resetUsb(){
    info("Usb TxRx reset.");
    m_resetReg->io()->setU8(0,2);
    m_resetReg->io()->setU8(1,0); 
    m_resetReg->dump();
    m_resetReg->write();
    
  };


  
  UsbFTMLInterface* usb(){
    return m_usb;
  }

  UsbMLI2cBus* i2c(){
    return m_usbi2c;
  }

  UsbMLSpiBus* spi(){
    return m_usbspi;
  }

  //Register* reg(){
  //  return m_reg;
  //}

  void update () {
  };


  Register* setupReg()  { return m_setupReg;  }

  Register* masterI2cReg() { return m_masterI2cReg; }
  Register* addI2cReg()    { return m_addI2cReg;    }

  StatusCode testSequence() {
    info("FePGA testSequence.");
    return m_testSeqReg->write();
  };
  
  //  StatusCode setExtTrig( bool ); // QUESTION : DOES THE 3CU need this?

  //bool extTrig();   // QUESTION : DOES THE 3CU need this ? 

  StatusCode setSpiGBTSCA( bool );

  bool spiGBTSCA();  

  StatusCode setSpiAdd( unsigned long int );

  unsigned long int spiAdd();
  
  StatusCode setSpiSubAdd( unsigned long int );

  unsigned long int spiSubAdd();


  StatusCode spiRead (unsigned int, unsigned int, unsigned int*) ; 

  StatusCode spiWrite (unsigned int, unsigned int, unsigned int*) ;

  PyObject* spiRead (unsigned int, unsigned int) ; 

  StatusCode spiWrite (unsigned int, unsigned int, PyObject*) ;

  unsigned int spiRead (unsigned int) ; 

  StatusCode spiWrite (unsigned int, unsigned int);

  StatusCode setI2cGBTSCA( bool );

  bool i2cGBTSCA( );

  StatusCode setI2cBuffer( unsigned long int );
  
  unsigned long int i2cBuffer();
  

  unsigned long int i2cData();
  
  StatusCode setI2cAdd( unsigned long int );
  
  unsigned long int i2cAdd();
  
  StatusCode setI2cSubAdd( unsigned long int );
  
  unsigned long int i2cSubAdd();
  
  StatusCode i2cRead( );
  
  StatusCode i2cWrite();
  
  unsigned long int i2cRead(unsigned long int);
  
  StatusCode i2cWrite(unsigned long int , unsigned long int );
  
  StatusCode transmitSpi() {
    return m_transmitSpiReg->write();
  }

  
 private:
  
  Register* MakeRegister(std::string name, unsigned int add);
  RAM* MakeRAM(std::string name, unsigned int add);

  UsbFTMLInterface *m_usb;
  UsbMLI2cBus      *m_usbi2c;
  UsbMLSpiBus      *m_usbspi;

  // Currently in firmware (2018-01-12)
  Register *m_transmitSpiReg; // Start SPI transmission.
  Register *m_ctrlSpiReg; // Length of the SPI Frame.
  Register *m_addSpiReg;      // Adress to read/write.

  RAM      *m_txSpiFifo;  // Frame to write
  RAM      *m_rxSpiFifo;  // Frame to read

  RAM      *m_testFifo;  // A test FIFO


  // Not sure if in firmware
  // Register *m_statusReg; // Not currently used??
  Register *m_setupReg;     // Toggle Spi or I2C
  Register *m_resetReg;     // Reset FPGA or USB
  Register *m_testSeqReg;   // Start test sequence

  unsigned int m_spiSubAdd;

  // I2C registers

  unsigned int m_i2cSubAdd;
  unsigned int m_i2cBuffer;

  Register *m_masterI2cReg;
  Register *m_addI2cReg;

};

#endif