FEB_v1 Class Reference

#include <inc/FEB_v1.h>

Inheritance diagram for FEB_v1:

Public Member Functions
	FEB_v1 ()
	Standard constructor. More...
virtual	~FEB_v1 ()
	Destructor. More...
void	help ()
StatusCode	init ()
void	reset ()
void	resetSpi ()
void	update ()
SeqPGA *	seqPga ()
StatusCode	setSpyModeSeq (bool)
bool	spyModeSeq ()
StatusCode	setSpyModeFE (int, bool)
bool	spyModeFE (int)
StatusCode	setDisableSubtract (int, bool)
bool	disableSubtract (int)
StatusCode	setOldSubtract (int, bool)
bool	oldSubtract (int)
StatusCode	setThreshold (int, int)
int	threshold (int)
StatusCode	setLatency (int, int)
int	latency (int)
StatusCode	setInjectModeFE (int, bool)
bool	injectModeFE (int)
StatusCode	setProbeEnable (int, bool)
void	probeEnable ()
StatusCode	setSpareForTrigEnable (int, int)
int	spareForTrigEnable (int)
StatusCode	setTestDuration (int)
int	testDuration (int fpga)
StatusCode	setStopInjLoop (bool)
bool	stopInjLoop (int)
StatusCode	setEnableBXIDReset (bool)
bool	enableBXIDReset ()
StatusCode	setGain4 (int, int, bool)
StatusCode	setPseudoADCEnable (int, int, bool)
StatusCode	setPseudoPMEnable (int, int, bool)
StatusCode	setGlobalPseudoPMEnable (int, bool)
StatusCode	setClockFallingEdge (int, int, bool)
StatusCode	setClock80MHzFallingEdge (bool)
StatusCode	setCalibCte (int, int, int)
bool	gain4 (int, int)
bool	pseudoADCEnable (int, int)
bool	pseudoPMEnable (int, int)
bool	globalPseudoPMEnable (int)
bool	clockFallingEdge (int, int)
bool	clock80MHzFallingEdge ()
int	calibCte (int, int)
StatusCode	testSequence ()
StatusCode	setExtTrig (bool trig)
bool	extTrig ()
void	readFifo (int, int, unsigned int *)
void	readFifoSpyFE (int fe, int dump)
void	readFifoLLTFE (int fe, int dump)
void	readFifoInjectFE (int fe, int dump)
void	readFifoLLT (int dump)
void	maskLLT ()
void	latencyLLT ()
StatusCode	setMaskLLT (int, bool)
StatusCode	setMaskLLTCorner (bool)
StatusCode	setMaskLLTUpNb (int, bool)
StatusCode	setMaskLLTSideNb (int, bool)
StatusCode	setLatencyLLT (int)
StatusCode	setLatencyLLTCorner (int)
StatusCode	setLatencyLLTUpNb (int)
StatusCode	setLatencyLLTSideNb (int)
StatusCode	setOutputEport (int, int, int)
int	latencyEport (int)
int	clockPhaseEport (int)
StatusCode	setOutputEport (int, int, int, int)
int	latencyEport (int, int)
int	clockPhaseEport (int, int)
void	writeFifoSpyFE (int fe)
void	writeFifoLLTFE (int fe)
void	writeFifoInjectFE (int fe, int pattern)
void	writeDataFifoInjectFE (int, int *, int *, int *, int *)
void	writeFifoLLT ()
StatusCode	resetFifoSpyFE (int)
StatusCode	resetFifoInjectFE (int)
StatusCode	resetFE (int)
int	statusRegister (int)
Data *	data ()
RAM *	ramInj (int i)
RAM *	ramSpy (int i)
StatusCode	setGbtMode (int, int)
int	gbtMode (int)
StatusCode	setGbtDataPath (int, int, int, int)
int	gbtDataPath (int)
StatusCode	setGbtTrackMode (int, int)
int	gbtTrackMode (int)
StatusCode	setGbtTermEport (int, bool)
bool	gbtTermEport (int)
StatusCode	setGbt80MHzClkEport (int)
bool	gbt80MHzClkEport (int)
StatusCode	setGbtDLLEport (int)
void	gbtDLLEport (int)
StatusCode	setGbtEnableEport (int, bool)
bool	gbtEnableEport (int)
int	gbtStatus (int)
StatusCode	setGbtClockStrength (int, int)
int	gbtClockStrength (int)
StatusCode	gbtDLLReset (int)
StatusCode	gbtAcknowledgeConfig (int)
Public Member Functions inherited from Element
	Element ()
	Standard constructor. More...
virtual	~Element ()
	Destructor. More...
void	recursiveInitElement ()
void	recursiveInitCommunications ()
StatusCode	setConnection (Hierarchy *)
Hierarchy *	connection ()
Public Member Functions inherited from Hierarchy
	Hierarchy ()
	Standard constructor. More...
virtual	~Hierarchy ()
	Destructor. More...
void	clear ()
void	setParent (Hierarchy *parent)
Hierarchy *	parent ()
Hierarchy *	parent (std::string)
Hierarchy *	origin ()
virtual void	addChild (Hierarchy *element)
std::vector< Hierarchy * >	children ()
Hierarchy *	child (std::string)
Hierarchy *	childTyped (std::string)
unsigned long	numberOfChildren ()
bool	hasChildren ()
void	delChild (Hierarchy *)
void	delChild (std::string)
std::string	path (std::string=std::string(""))
std::string	pathTyped (std::string=std::string(""))
void	tree (std::string indent=std::string(""))
void	tree ()
Public Member Functions inherited from Object
	Object ()
	Standard constructor. More...
virtual	~Object ()
	Destructor. More...
std::string	name () const
std::string	type ()
unsigned char	id ()
std::string	title ()
void	msgSvc (int level, std::string msg, std::string name)
void	msg (std::string mymsg)
void	verbose (std::string mymsg)
void	debug (std::string mymsg)
void	info (std::string mymsg)
void	warning (std::string mymsg)
void	error (std::string mymsg)
void	fatal (std::string mymsg)
void	msg (std::string mymsg, std::string name)
void	verbose (std::string mymsg, std::string name)
void	debug (std::string mymsg, std::string name)
void	info (std::string mymsg, std::string name)
void	warning (std::string mymsg, std::string name)
void	error (std::string mymsg, std::string name)
void	fatal (std::string mymsg, std::string name)
void	setName (std::string name)
void	setType (std::string type)
void	setId (unsigned char id)
void	setTitle (std::string title)
void	setDllName (std::string dllName)
std::string	dllName ()
Public Member Functions inherited from Attrib
	Attrib ()
	Standard constructor. More...
virtual	~Attrib ()
	Destructor. More...
bool	is (int attribut)
void	add (int attribut)
void	remove (int attribut)
std::string	attributs ()

Private Attributes
int	m_fifoDepth
int	m_seqAddress
int	m_feAddress [8]
int	m_gbtAddress [4]
int	m_icecalAddress [8]
int	m_fifoSpyAddress [3]
int	m_fifoLLTAddress [3]
int	m_fifoInjectAddress [3]
int	m_fifoTrigAddress [3]
SeqPGA *	m_seqPga
unsigned int *	m_fifo [3]
int *	m_ch [4]
Data *	m_data
int	m_mask0
int	m_mask1
int	m_mask2
int	m_latency0
int	m_latency1
int	m_latency2
int	m_latency3
RAM *	m_ramInj [3]
RAM *	m_ramSpy [3]
RAM *	m_fifoUsbTest

Additional Inherited Members
Public Types inherited from Attrib
enum	Attribut {   UNDEFINED, PASSIVE, ACTIVE, INTERFACE,   IO, IODATA, ELEMENT, HARDWARE,   PROCESSUS, SOFTWARE }
Protected Attributes inherited from Element
Hierarchy *	m_connection
Protected Attributes inherited from Attrib
std::string	m_attribString [10]

Detailed Description

Author

Date

2006-10-23

Definition at line 21 of file FEB_v1.h.

Constructor & Destructor Documentation

FEB_v1()

FEB_v1::FEB_v1

(

)

Standard constructor.

Definition at line 18 of file FEB_v1.cpp.

References Attrib::add(), Hierarchy::addChild(), Data::addDataStream(), Attrib::ELEMENT, Attrib::HARDWARE, itos(), m_ch, m_data, m_feAddress, m_fifo, m_fifoDepth, m_fifoInjectAddress, m_fifoLLTAddress, m_fifoSpyAddress, m_fifoTrigAddress, m_fifoUsbTest, m_gbtAddress, m_icecalAddress, m_ramInj, m_ramSpy, m_seqAddress, m_seqPga, seqPga(), IOobject::setAddress(), Object::setName(), RAM::setSize(), Object::setType(), and SeqPGA::usb().

                 {
  setName("FEB_v1");
  setType("FEB_v1");
  add(Attrib::ELEMENT); add (Attrib::HARDWARE);

  m_fifoDepth = 1024;

  m_feAddress[0] = 1;
  m_feAddress[1] = 2;
  m_feAddress[2] = 5;
  m_feAddress[3] = 6;
  m_feAddress[4] = 9;
  m_feAddress[5] = 10;
  m_feAddress[6] = 13;
  m_feAddress[7] = 14;

  m_seqAddress   = 17 ; 

  m_gbtAddress[0] = 1;
  m_gbtAddress[1] = 2;
  m_gbtAddress[2] = 3;
  m_gbtAddress[3] = 4;
    
  m_icecalAddress[0] = 3;
  m_icecalAddress[1] = 4;
  m_icecalAddress[2] = 7;
  m_icecalAddress[3] = 8;
  m_icecalAddress[4] = 11;
  m_icecalAddress[5] = 12;
  m_icecalAddress[6] = 15;
  m_icecalAddress[7] = 16;
    
  m_fifoSpyAddress[0] = 20;
  m_fifoSpyAddress[1] = 21;
  m_fifoSpyAddress[2] = 22;

  m_fifoInjectAddress[0] = 23;
  m_fifoInjectAddress[1] = 24;
  m_fifoInjectAddress[2] = 25;

  m_fifoLLTAddress[0] = 26;
  m_fifoLLTAddress[1] = 27;
  m_fifoLLTAddress[2] = 29;

  m_fifoTrigAddress[0] = 10;
  m_fifoTrigAddress[1] = 11;
  m_fifoTrigAddress[2] = 17;

  m_seqPga =new SeqPGA();
  m_seqPga->setName("SeqPGA");
  addChild(m_seqPga);

  m_fifo[0] = new unsigned int[m_fifoDepth];
  m_fifo[1] = new unsigned int[m_fifoDepth];
  m_fifo[2] = new unsigned int[m_fifoDepth];

  m_ch[0] = new int[m_fifoDepth];
  m_ch[1] = new int[m_fifoDepth];
  m_ch[2] = new int[m_fifoDepth];
  m_ch[3] = new int[m_fifoDepth];

  for (int i = 0; i<3; ++i){
    m_ramInj[i] = new RAM();
    m_ramSpy[i] = new RAM();
    seqPga()->usb()->addChild(m_ramInj[i]);
    seqPga()->usb()->addChild(m_ramSpy[i]);
    m_ramInj[i]->setAddress(13); // for debug
    m_ramSpy[i]->setAddress(m_fifoSpyAddress[i]);
    m_ramInj[i]->setSize(16, m_fifoDepth);
    m_ramSpy[i]->setSize(16, m_fifoDepth);
  }

  m_fifoUsbTest = new RAM();
  m_fifoUsbTest->setAddress(3);
  m_fifoUsbTest->setSize(16,256);
  m_fifoUsbTest->setName("FifoUsbTest");
  seqPga()->usb()->addChild(m_fifoUsbTest);

  m_data = new Data();
  for (int ch=0; ch<32; ++ch){
    m_data->addDataStream("ch"+itos(ch), "Channel "+itos(ch));
  }
  m_data->addDataStream("llt_fifo0", "llt_fifo0");
  m_data->addDataStream("llt_fifo1", "llt_fifo1");
  
}

~FEB_v1()

FEB_v1::~FEB_v1 ( )

virtual

Destructor.

Definition at line 107 of file FEB_v1.cpp.

                {
}

Member Function Documentation

calibCte()

int FEB_v1::calibCte	(	int	fe,
		int	ch
	)

Definition at line 998 of file FEB_v1.cpp.

References Object::info(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                     {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  int val = (m_seqPga->spiRead(4+ch))&0xFF;
  info("Calib Constante FE "+itos(fe)+" - Ch "+itos(ch)+" : "+itos(val),"FEB_v1::calibCte");
  return (bool)(val);
}

clock80MHzFallingEdge()

bool FEB_v1::clock80MHzFallingEdge

(

)

Definition at line 971 of file FEB_v1.cpp.

References Object::info(), itos(), m_seqAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                  {
  m_seqPga->setSpiAdd(m_seqAddress);
  int val = (m_seqPga->spiRead(1)>>4)&1;
  info("clock 80MHz Falling Edge : "+itos(val),"FEB_v1::clock80MHzFallingEdge");
  return (bool)(val);
}

clockFallingEdge()

bool FEB_v1::clockFallingEdge	(	int	fe,
		int	ch
	)

Definition at line 949 of file FEB_v1.cpp.

References Object::info(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                              {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  int val = (m_seqPga->spiRead(4+ch)>>8)&1;
  info("clock Falling Edge FE "+itos(fe)+" - Ch "+itos(ch)+" : "+itos(val),"FEB_v1::clockFallingEdge");
  return (bool)(val);
}

clockPhaseEport() [1/2]

int FEB_v1::clockPhaseEport

(

int

gbt

)

Definition at line 1575 of file FEB_v1.cpp.

References m_seqAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                                   {
  m_seqPga->setSpiAdd(m_seqAddress);
  return ((m_seqPga->spiRead(20+gbt)>>8)&0xFF);
}

clockPhaseEport() [2/2]

int FEB_v1::clockPhaseEport	(	int	fe,
		int	ch
	)

Definition at line 1600 of file FEB_v1.cpp.

References m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

                                          {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  return ((m_seqPga->spiRead(14+ch)>>6)&0x3F);
}

data()

Data* FEB_v1::data ( )

inline

Definition at line 147 of file FEB_v1.h.

References m_data.

Referenced by BOOST_PYTHON_MODULE(), enableBXIDReset(), setCalibCte(), setClock80MHzFallingEdge(), setClockFallingEdge(), setDisableSubtract(), setEnableBXIDReset(), setGain4(), setGlobalPseudoPMEnable(), setInjectModeFE(), setLatency(), setOldSubtract(), setOutputEport(), setPseudoADCEnable(), setPseudoPMEnable(), setSpyModeFE(), setSpyModeSeq(), setStopInjLoop(), setTestDuration(), and setThreshold().

{ return m_data; }

disableSubtract()

bool FEB_v1::disableSubtract

(

int

fe

)

Definition at line 754 of file FEB_v1.cpp.

References Object::info(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                    {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  int val = (m_seqPga->spiRead(1)>>9)&1;
  info("Disable Subtraction FE "+itos(fe)+": "+itos(val),"FEB_v1::disableSubtract");
  return val;
}

enableBXIDReset()

bool FEB_v1::enableBXIDReset

(

)

Definition at line 773 of file FEB_v1.cpp.

References data(), m_seqAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                             {
  m_seqPga->setSpiAdd(m_seqAddress);
  int data=m_seqPga->spiRead(1);
  return ( data >>11 ) & 1;
}

extTrig()

bool FEB_v1::extTrig ( )

inline

Definition at line 111 of file FEB_v1.h.

References clockPhaseEport(), SeqPGA::extTrig(), latencyEport(), latencyLLT(), m_seqPga, maskLLT(), readFifo(), readFifoInjectFE(), readFifoLLT(), readFifoLLTFE(), readFifoSpyFE(), resetFE(), resetFifoInjectFE(), resetFifoSpyFE(), setLatencyLLT(), setLatencyLLTCorner(), setLatencyLLTSideNb(), setLatencyLLTUpNb(), setMaskLLT(), setMaskLLTCorner(), setMaskLLTSideNb(), setMaskLLTUpNb(), setOutputEport(), statusRegister(), writeDataFifoInjectFE(), writeFifoInjectFE(), writeFifoLLT(), writeFifoLLTFE(), and writeFifoSpyFE().

Referenced by BOOST_PYTHON_MODULE().

{ return m_seqPga->extTrig( ); }

gain4()

bool FEB_v1::gain4	(	int	fe,
		int	ch
	)

Definition at line 845 of file FEB_v1.cpp.

References Object::info(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                   {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  int val = (m_seqPga->spiRead(4+ch)>>11)&1;
  info("Gain4 FE "+itos(fe)+" - Ch "+itos(ch)+" : "+itos(val),"FEB_v1::gain4");
  return (bool)(val);
}

gbt80MHzClkEport()

bool FEB_v1::gbt80MHzClkEport

(

int

gbt

)

Definition at line 1373 of file FEB_v1.cpp.

References SeqPGA::i2cRead(), Object::info(), itos(), m_gbtAddress, m_seqPga, and SeqPGA::setI2cAdd().

Referenced by BOOST_PYTHON_MODULE(), and ramSpy().

                                      {
  m_seqPga->setI2cAdd(m_gbtAddress[gbt]);
  int mode = m_seqPga->i2cRead(63);
  info("Eport clock for the GBT (63)  "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(63)));
  info("Eport clock for the GBT (87)  "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(87)));
  info("Eport clock for the GBT (111) "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(111)));
  info("Eport clock for the GBT (135) "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(135)));
  info("Eport clock for the GBT (159) "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(159)));
  info("Eport clock for the GBT (183) "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(183)));
  info("Eport clock for the GBT (207) "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(207)));
  return mode; 
}

gbtAcknowledgeConfig()

StatusCode FEB_v1::gbtAcknowledgeConfig

(

int

gbt

)

Definition at line 1656 of file FEB_v1.cpp.

References StatusCode::FAILURE, SeqPGA::i2cWrite(), StatusCode::isFailure(), itos(), m_gbtAddress, m_seqPga, SeqPGA::setI2cAdd(), StatusCode::SUCCESS, and Object::warning().

Referenced by BOOST_PYTHON_MODULE(), and ramSpy().

                                              {
  m_seqPga->setI2cAdd(m_gbtAddress[gbt]);
  if (m_seqPga->i2cWrite(365, 170).isFailure()){
    warning("Cannot acknowledge configuration of GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  return StatusCode::SUCCESS;
}

gbtClockStrength()

int FEB_v1::gbtClockStrength

(

int

gbt

)

Definition at line 1542 of file FEB_v1.cpp.

References SeqPGA::i2cRead(), m_gbtAddress, m_seqPga, SeqPGA::setI2cAdd(), and Object::warning().

Referenced by BOOST_PYTHON_MODULE(), and ramSpy().

                                   {
  int ports[4]={ 269, 270, 271, 272 };
  m_seqPga->setI2cAdd(m_gbtAddress[gbt]);
  int val0 = m_seqPga->i2cRead(ports[0])&0xF; 
  int val1 = m_seqPga->i2cRead(ports[1])&0xF; 
  int val2 = m_seqPga->i2cRead(ports[2])&0xF; 
  int val3 = m_seqPga->i2cRead(ports[3])&0xF; 
  if ( val1 != val0 || val2 != val0 || val3 != val0 ){
      warning("Output clock strength registers are not identical");
      return -1;
  }
  if ( (val0&0xF) != ((val0&0xF0)>>4)){
      warning("Output clock strength registers are not identical");
      return -1;
    }
  return val0&0xF;
}

gbtDataPath()

int FEB_v1::gbtDataPath

(

int

gbt

)

Definition at line 1239 of file FEB_v1.cpp.

References SeqPGA::i2cRead(), Object::info(), itos(), m_gbtAddress, m_seqPga, and SeqPGA::setI2cAdd().

Referenced by BOOST_PYTHON_MODULE(), and ramSpy().

                                {
  m_seqPga->setI2cAdd(m_gbtAddress[gbt]);
  int mode = m_seqPga->i2cRead(29);
  info("Data Path (A) of the GBT "+itos(gbt)+" is "+itos(mode));
  info("Data Path (B) of the GBT "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(30)));
  info("Data Path (C) of the GBT "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(31)));
  return mode; 
}

gbtDLLEport()

void FEB_v1::gbtDLLEport

(

int

gbt

)

Definition at line 1467 of file FEB_v1.cpp.

References SeqPGA::i2cRead(), Object::info(), itos(), m_gbtAddress, m_seqPga, and SeqPGA::setI2cAdd().

Referenced by BOOST_PYTHON_MODULE(), and ramSpy().

                                 {
  m_seqPga->setI2cAdd(m_gbtAddress[gbt]);
  info("Eport DLL Charge pump for the GBT (64)  "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(64)));
  info("Eport DLL Charge pump for the GBT (65)  "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(65)));
  info("Eport DLL Charge pump for the GBT (88)  "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(88)));
  info("Eport DLL Charge pump for the GBT (89)  "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(89)));
  info("Eport DLL Charge pump for the GBT (112)  "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(112)));
  info("Eport DLL Charge pump for the GBT (113)  "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(113)));
  info("Eport DLL Charge pump for the GBT (136)  "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(136)));
  info("Eport DLL Charge pump for the GBT (137)  "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(137)));
  info("Eport DLL Charge pump for the GBT (160)  "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(160)));
  info("Eport DLL Charge pump for the GBT (161)  "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(161)));
  info("Eport DLL Charge pump for the GBT (184)  "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(184)));
  info("Eport DLL Charge pump for the GBT (185)  "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(185)));
  info("Eport DLL Charge pump for the GBT (208)  "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(208)));
  info("Eport DLL Charge pump for the GBT (209)  "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(209)));
  info("Eport DLL Charge pump for the GBT (231)  "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(231)));
  info("Eport DLL Charge pump for the GBT (232)  "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(232)));  
}

gbtDLLReset()

StatusCode FEB_v1::gbtDLLReset

(

int

gbt

)

Definition at line 1614 of file FEB_v1.cpp.

References StatusCode::FAILURE, SeqPGA::i2cRead(), SeqPGA::i2cWrite(), Object::info(), StatusCode::isFailure(), itos(), m_gbtAddress, m_seqPga, SeqPGA::setI2cAdd(), StatusCode::SUCCESS, and Object::warning().

Referenced by BOOST_PYTHON_MODULE(), and ramSpy().

                                     {
  m_seqPga->setI2cAdd(m_gbtAddress[gbt]);
  int registers[8]={
    65, 89, 113, 137, 161, 185, 209, 232
  };
  int zero = 0;
  int one  = 7;
  for ( int i =0; i<8; ++i){
    int val  = m_seqPga->i2cRead(registers[i]);
    int val0 = val & (0b10001111);
    int val1 = val | (0b1110000);
    StatusCode stat1 = m_seqPga->i2cWrite(registers[i], val1);
    StatusCode stat0 = m_seqPga->i2cWrite(registers[i], val0);
    if (stat0.isFailure() || stat1.isFailure()){
      warning("Could not reset DLL register "+itos(registers[i])+" of GBT "+itos(gbt));
      return StatusCode::FAILURE;
    }
  }
  info("Reset of the DLL of GBT "+itos(gbt));
  return StatusCode::SUCCESS;
}

gbtEnableEport()

bool FEB_v1::gbtEnableEport

(

int

gbt

)

Definition at line 1515 of file FEB_v1.cpp.

References SeqPGA::i2cRead(), Object::info(), itos(), m_gbtAddress, m_seqPga, and SeqPGA::setI2cAdd().

Referenced by BOOST_PYTHON_MODULE(), and ramSpy().

                                    {
  int ports[21]={81, 82, 83, 105, 106, 107, 129, 130, 131, 153, 154,
         155, 177, 178, 179, 201, 202, 203, 225, 226, 227};
  m_seqPga->setI2cAdd(m_gbtAddress[gbt]);
  for (int i = 0; i<21; ++i){
    info("Eport enable ("+itos(ports[i])+") for the GBT "+itos(gbt)+" : "+itos(m_seqPga->i2cRead(ports[i])));
  }
  return m_seqPga->i2cRead(ports[0])&1;
}

gbtMode()

int FEB_v1::gbtMode

(

int

gbt

)

Definition at line 1202 of file FEB_v1.cpp.

References SeqPGA::i2cRead(), Object::info(), itos(), m_gbtAddress, m_seqPga, and SeqPGA::setI2cAdd().

Referenced by BOOST_PYTHON_MODULE(), and ramSpy().

                            {
  std::string modes[4] = {
    "Normal operating mode",
    "Fixed pattern mode",
    "30 bit counter",
    "7 bit shift register"
  };
  m_seqPga->setI2cAdd(m_gbtAddress[gbt]);
  int mode = m_seqPga->i2cRead(28);
  info("Tx mode of the GBT "+itos(gbt)+
       " is : "+modes[mode]+" ["+itos(mode)+"]");
  return mode; 
}

gbtStatus()

int FEB_v1::gbtStatus

(

int

gbt

)

Definition at line 1640 of file FEB_v1.cpp.

References Object::error(), SeqPGA::i2cRead(), Object::info(), itos(), m_gbtAddress, m_seqPga, and SeqPGA::setI2cAdd().

Referenced by BOOST_PYTHON_MODULE(), and ramSpy().

                            {
  m_seqPga->setI2cAdd(m_gbtAddress[gbt]);
  int status_gbt = (m_seqPga->i2cRead(431) >> 2);
  if (status_gbt==24){
    info("GBT status is 0d"+ itos(status_gbt),"GBT Config");
  }
  else {
    error("GBT status is 0d"+ itos(status_gbt),"GBT Config");
  }
  return status_gbt;
}

gbtTermEport()

bool FEB_v1::gbtTermEport

(

int

gbt

)

Definition at line 1322 of file FEB_v1.cpp.

References SeqPGA::i2cRead(), Object::info(), itos(), m_gbtAddress, m_seqPga, and SeqPGA::setI2cAdd().

Referenced by BOOST_PYTHON_MODULE(), and ramSpy().

                                  {
  m_seqPga->setI2cAdd(m_gbtAddress[gbt]);
  info("Eport termination of the GBT (320) "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(320)&1));
  info("Eport termination of the GBT (321) "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(321)&1));
  info("Eport termination of the GBT (322) "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(322)&1));
  info("Eport termination of the GBT (323) "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(323)&1));
  info("Eport termination of the GBT (324) "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(324)&1));
  info("Eport termination of the GBT (325) "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(325)&1));
  info("Eport termination of the GBT (326) "+itos(gbt)+" is "+itos(m_seqPga->i2cRead(326)&1));
  return m_seqPga->i2cRead(320)&1;
}

gbtTrackMode()

int FEB_v1::gbtTrackMode

(

int

gbt

)

Definition at line 1268 of file FEB_v1.cpp.

References SeqPGA::i2cRead(), Object::info(), itos(), m_gbtAddress, m_seqPga, and SeqPGA::setI2cAdd().

Referenced by BOOST_PYTHON_MODULE(), and ramSpy().

                                 {
  std::string str_mode[3]={
    "Static phase selection",
    "Training mode",
    "Automatic phase tracking"
  };
  m_seqPga->setI2cAdd(m_gbtAddress[gbt]);
  int mode = m_seqPga->i2cRead(62);
  info("Track mode of the GBT "+itos(gbt)+" is : "+itos(mode)+" -> "+str_mode[mode&0b11]); 
  return mode; 
}

globalPseudoPMEnable()

bool FEB_v1::globalPseudoPMEnable

(

int

fe

)

Definition at line 922 of file FEB_v1.cpp.

References Object::info(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                         {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  int val = (m_seqPga->spiRead(1)>>10)&1;
  info("Global Pseudo PM Enable FE "+itos(fe)+" : "+itos(val),"FEB_v1::globalPseudoPMEnable");
  return (bool)(val);
}

help()

void FEB_v1::help ( )

inlinevirtual

printout help for the element

Implements Element.

Definition at line 31 of file FEB_v1.h.

References Object::info(), and Object::name().

{ info("FEB_v1 "+name()+". No help.","FEB_v1::help"); };

init()

StatusCode FEB_v1::init ( )

inlinevirtual

init the component

Returns

void

Implements Element.

Definition at line 37 of file FEB_v1.h.

References StatusCode::SUCCESS.

                    {
    return StatusCode::SUCCESS;
  };

injectModeFE()

bool FEB_v1::injectModeFE

(

int

fe

)

Definition at line 818 of file FEB_v1.cpp.

References Object::info(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                 {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  int val = (m_seqPga->spiRead(1)>>10)&1;
  info("Inject Mode FE "+itos(fe)+": "+itos(val),"FEB_v1::injectModeFE");
  return (bool)(val);
}

latency()

int FEB_v1::latency

(

int

fe

)

Definition at line 731 of file FEB_v1.cpp.

References Object::info(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

Referenced by BOOST_PYTHON_MODULE(), latencyLLT(), seqPga(), setLatencyLLT(), setLatencyLLTCorner(), setLatencyLLTSideNb(), and setLatencyLLTUpNb().

                           {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  int val = (m_seqPga->spiRead(1))&(0xFF);
  info("latency FE "+itos(fe)+": "+itos(val),"FEB_v1::latency");
  return val;
}

latencyEport() [1/2]

int FEB_v1::latencyEport

(

int

gbt

)

Definition at line 1580 of file FEB_v1.cpp.

References m_seqAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                                {
  m_seqPga->setSpiAdd(m_seqAddress);
  return (m_seqPga->spiRead(20+gbt)&0xFF);
}

latencyEport() [2/2]

int FEB_v1::latencyEport	(	int	fe,
		int	ch
	)

Definition at line 1605 of file FEB_v1.cpp.

References m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

                                       {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  return (m_seqPga->spiRead(14+ch)&0x3F);
}

latencyLLT()

void FEB_v1::latencyLLT

(

)

Definition at line 1009 of file FEB_v1.cpp.

References Object::info(), itos(), latency(), m_latency0, m_latency1, m_latency2, m_latency3, m_seqAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                       {
  m_seqPga->setSpiAdd(m_seqAddress);
  int latency = m_seqPga->spiRead(3);
  m_latency0=(latency>>12)&0xF;
  m_latency1=(latency>>8)&0xF;
  m_latency2=(latency>>4)&0xF;
  m_latency3=latency&0xF;
  info("LLT Channel latency : "+itos(m_latency0));
  info("LLT Up nb   latency : "+itos(m_latency1));
  info("LLT Side nb latency : "+itos(m_latency2));
  info("LLT Corner  latency : "+itos(m_latency3));
}

maskLLT()

void FEB_v1::maskLLT

(

)

Definition at line 1091 of file FEB_v1.cpp.

References Object::info(), itos(), m_mask0, m_mask1, m_mask2, m_seqAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                    {
  m_seqPga->setSpiAdd(m_seqAddress);
  m_mask0=m_seqPga->spiRead(4);
  m_mask1=m_seqPga->spiRead(5);
  m_mask2=m_seqPga->spiRead(6);
  for (int i = 0; i<16; ++i){
    info("Channel "+itos(i)+" masked status : "+itos((m_mask0>>i)&1));
  }
  for (int i = 0; i<16; ++i){
    info("Channel "+itos(i+16)+" masked status : "+itos((m_mask1>>i)&1));
  }  
  for (int i = 0; i<4; ++i){
    info("Up Neig "+itos(i)+" masked status : "+itos((m_mask2>>(i+12))&1));
  }
  for (int i = 0; i<8; ++i){
    info("Sd Neig "+itos(i)+" masked status : "+itos((m_mask2>>(i+4))&1));
  }
  info("Corner masked status : "+itos((m_mask2>>3)&1));
}

oldSubtract()

bool FEB_v1::oldSubtract

(

int

fe

)

Definition at line 795 of file FEB_v1.cpp.

References Object::info(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  int val = (m_seqPga->spiRead(1)>>8)&1;
  info("Old Subtract "+itos(fe)+": "+itos(val),"FEB_v1::oldSubtract");
  return val;
}

probeEnable()

void FEB_v1::probeEnable

(

)

Definition at line 620 of file FEB_v1.cpp.

References Object::info(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                        {
  for (int fe = 0; fe<8; ++fe){
    m_seqPga->setSpiAdd(m_feAddress[fe]);
    int val = (m_seqPga->spiRead(2))&0xF;
    info("Probe Enable FE "+itos(fe)+": "+itos(val),"FEB_v1::probeEnable");
  }
}

pseudoADCEnable()

bool FEB_v1::pseudoADCEnable	(	int	fe,
		int	ch
	)

Definition at line 872 of file FEB_v1.cpp.

References Object::info(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                             {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  int val = (m_seqPga->spiRead(4+ch)>>10)&1;
  info("Pseudo ADC Enable FE "+itos(fe)+" - Ch "+itos(ch)+" : "+itos(val),"FEB_v1::pseudoADCEnable");
  return (bool)(val);
}

pseudoPMEnable()

bool FEB_v1::pseudoPMEnable	(	int	fe,
		int	ch
	)

Definition at line 899 of file FEB_v1.cpp.

References Object::info(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                            {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  int val = (m_seqPga->spiRead(4+ch)>>9)&1;
  info("Pseudo PM Enable FE "+itos(fe)+" - Ch "+itos(ch)+" : "+itos(val),"FEB_v1::pseudoPMEnable");
  return (bool)(val);
}

ramInj()

RAM* FEB_v1::ramInj ( int  i )

inline

Definition at line 148 of file FEB_v1.h.

References m_ramInj.

Referenced by BOOST_PYTHON_MODULE().

                     {
    return m_ramInj[i];
  }

ramSpy()

RAM* FEB_v1::ramSpy ( int  i )

inline

Definition at line 151 of file FEB_v1.h.

References gbt80MHzClkEport(), gbtAcknowledgeConfig(), gbtClockStrength(), gbtDataPath(), gbtDLLEport(), gbtDLLReset(), gbtEnableEport(), gbtMode(), gbtStatus(), gbtTermEport(), gbtTrackMode(), m_ramSpy, setGbt80MHzClkEport(), setGbtClockStrength(), setGbtDataPath(), setGbtDLLEport(), setGbtEnableEport(), setGbtMode(), setGbtTermEport(), and setGbtTrackMode().

Referenced by BOOST_PYTHON_MODULE().

                     {
    return m_ramSpy[i];
  }

readFifo()

void FEB_v1::readFifo	(	int	add,
		int	subadd,
		unsigned int *	fifo
	)

Definition at line 113 of file FEB_v1.cpp.

References m_fifoDepth, m_seqPga, and SeqPGA::spiRead().

Referenced by extTrig(), readFifoInjectFE(), readFifoLLT(), readFifoLLTFE(), and readFifoSpyFE().

                                                              {
  m_seqPga->spiRead(subadd, m_fifoDepth, fifo);
}

readFifoInjectFE()

void FEB_v1::readFifoInjectFE	(	int	fe,
		int	dump = 0
	)

Definition at line 236 of file FEB_v1.cpp.

References Object::info(), m_ch, m_feAddress, m_fifo, m_fifoInjectAddress, m_seqPga, readFifo(), setInjectModeFE(), SeqPGA::setSpiGBTSCA(), and testDuration().

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                                                {
  setInjectModeFE(fe, false);
  m_seqPga->setSpiGBTSCA (false);
  info("Reading fifo 0","FEB_v1::readFifoInjectFE");
  readFifo(m_feAddress[fe], m_fifoInjectAddress[0], m_fifo[0]);
  info("Reading fifo 1","FEB_v1::readFifoInjectFE");
  readFifo(m_feAddress[fe], m_fifoInjectAddress[1], m_fifo[1]);
  info("Reading fifo 2","FEB_v1::readFifoInjectFE");
  readFifo(m_feAddress[fe], m_fifoInjectAddress[2], m_fifo[2]);
  
  char buffer[100];
  int depth = testDuration(fe);
  for (int d=0; d<depth; ++d){ 
    m_ch[0][d]=m_fifo[0][d]&0x0FFF;
    m_ch[1][d]=(((m_fifo[0][d]&0xF000)>>12)+((m_fifo[1][d]&0x00FF)<<4))&0xFFF;
    m_ch[2][d]=(((m_fifo[1][d]&0xFF00)>>8)+((m_fifo[2][d]&0x000F)<<8))&0xFFF;
    m_ch[3][d]=((m_fifo[2][d]&0xFFF0)>>4)&0xFFF;
    if (dump>0) {
      sprintf(buffer,"%5d : %5d %5d %5d %5d  |  %5d %5d %5d", d,
          m_ch[0][d], m_ch[1][d], m_ch[2][d], m_ch[3][d],
          m_fifo[0][d], m_fifo[1][d], m_fifo[2][d]);
      info(buffer,"FEB_v1::readFifoInjectFE");
    }
  }
  setInjectModeFE(fe, true);
}

readFifoLLT()

void FEB_v1::readFifoLLT

(

int

dump = 0

)

Definition at line 200 of file FEB_v1.cpp.

References Data::clear(), Data::dataFill(), Object::info(), m_data, m_fifo, m_fifoTrigAddress, m_seqAddress, m_seqPga, readFifo(), SeqPGA::setSpiGBTSCA(), and testDuration().

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                                  {

  m_seqPga->setSpiGBTSCA (false) ;
  info("Reading fifo 0","FEB_v1::readFifoLLT");
  readFifo(m_seqAddress, m_fifoTrigAddress[0], m_fifo[0]);
  info("Reading fifo 1","FEB_v1::readFifoLLT");
  readFifo(m_seqAddress, m_fifoTrigAddress[1], m_fifo[1]);
  info("Reading fifo 2","FEB_v1::readFifoLLT");
  readFifo(m_seqAddress, m_fifoTrigAddress[2], m_fifo[2]);
  
  char buffer[100];
  int depth = testDuration(-1);

  m_data->clear(32);
  m_data->clear(33);
  
  for (int d=0; d<depth; ++d){
    m_data->dataFill(32, m_fifo[0][d]);
    m_data->dataFill(33, m_fifo[1][d]);
    if (dump>0) {
      sprintf(buffer,
          "%5d : ETtot=%4d ETmax=%4d [%2d] Mult=%2d Bx=%4d (%4d) | %5d %5d %5d",
          d,
          (m_fifo[0][d])&0x7FF, (m_fifo[1][d])&0x3FF, 
          (m_fifo[0][d]>>11)&0x1F,(m_fifo[1][d]>>10)&0x3F, 
          (m_fifo[2][d]>>10)&0x3F,(m_fifo[2][d])&0x3FF,
          m_fifo[0][d], m_fifo[1][d], m_fifo[2][d]);
      info(buffer,"FEB_v1::readFifoLLT");
    }
  }
}

readFifoLLTFE()

void FEB_v1::readFifoLLTFE	(	int	fe,
		int	dump = 0
	)

Definition at line 160 of file FEB_v1.cpp.

References Data::clear(), Data::dataFill(), Object::info(), m_ch, m_data, m_feAddress, m_fifo, m_fifoLLTAddress, m_seqPga, readFifo(), SeqPGA::setSpiGBTSCA(), and testDuration().

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                                             {

  m_seqPga->setSpiGBTSCA (false) ;
  info("Reading fifo 0","FEB_v1::readFifoLLTFE");
  readFifo(m_feAddress[fe], m_fifoLLTAddress[0], m_fifo[0]);
  info("Reading fifo 1","FEB_v1::readFifoLLTFE");
  readFifo(m_feAddress[fe], m_fifoLLTAddress[1], m_fifo[1]);
  info("Reading fifo 2","FEB_v1::readFifoLLTFE");
  readFifo(m_feAddress[fe], m_fifoLLTAddress[2], m_fifo[2]);
  
  char buffer[100];
  
  int depth = testDuration(fe);

  for (int ch=0; ch<4; ++ch){
    m_data->clear(4*fe+ch);
  }
  
  for (int d=0; d<depth; ++d){ 
    m_ch[0][d]=m_fifo[0][d]&0x3FF;
    m_ch[1][d]=(((m_fifo[0][d])>>10)+((m_fifo[1][d]&0xF)<<6))&0x3FF;
    m_ch[2][d]=((m_fifo[1][d]&0x3FF0)>>4);
    m_ch[3][d]=m_fifo[2][d]&0x3FF;
    for (int ch=0; ch<4; ++ch){
      m_data->dataFill(4*fe+ch , m_ch[ch][d]);
    }
    if (dump>0) {
      sprintf(buffer,"%5d : %5d %5d %5d %5d  |  %5d %5d %5d", d,
          m_ch[0][d], m_ch[1][d], m_ch[2][d], m_ch[3][d],
          m_fifo[0][d], m_fifo[1][d], m_fifo[2][d]);
      info(buffer,"FEB_v1::readFifoLLTFE");
    }
  }
}

readFifoSpyFE()

void FEB_v1::readFifoSpyFE	(	int	fe,
		int	dump = 0
	)

Definition at line 121 of file FEB_v1.cpp.

References Data::clear(), Data::dataFill(), Object::debug(), Object::info(), m_ch, m_data, m_feAddress, m_fifo, m_fifoSpyAddress, m_seqPga, readFifo(), SeqPGA::setSpiAdd(), and testDuration().

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                                             {
   
  m_seqPga->setSpiAdd(m_feAddress[fe]);

  debug("Reading fifo 0","FEB_v1::readFifoSpyFE");
  readFifo(m_feAddress[fe], m_fifoSpyAddress[0], m_fifo[0]);
  debug("Reading fifo 1","FEB_v1::readFifoSpyFE");
  readFifo(m_feAddress[fe], m_fifoSpyAddress[1], m_fifo[1]);
  debug("Reading fifo 2","FEB_v1::readFifoSpyFE");
  readFifo(m_feAddress[fe], m_fifoSpyAddress[2], m_fifo[2]);
  
  char buffer[100];
  
  int depth = testDuration(fe);
  for (int ch=0; ch<4; ++ch){
    m_data->clear(4*fe+ch);
  }
  
  for (int d=0; d<depth; ++d){ 
    m_ch[0][d]=m_fifo[0][d]&0x0FFF;
    m_ch[1][d]=(((m_fifo[0][d]&0xF000)>>12)+((m_fifo[1][d]&0x00FF)<<4))&0xFFF;
    m_ch[2][d]=(((m_fifo[1][d]&0xFF00)>>8)+((m_fifo[2][d]&0x000F)<<8))&0xFFF;
    m_ch[3][d]=(m_fifo[2][d]&0xFFF0)>>4;
    for (int ch=0; ch<4; ++ch){
      m_data->dataFill(4*fe+ch , m_ch[ch][d]);
    }
    if (dump>0) {
      sprintf(buffer,"%5d : %5d %5d %5d %5d  |  %5d %5d %5d", d,
          m_ch[0][d], m_ch[1][d], m_ch[2][d], m_ch[3][d],
          m_fifo[0][d], m_fifo[1][d], m_fifo[2][d]);
      info(buffer,"FEB_v1::readFifoSpyFE");
    }
  }
}

reset()

void FEB_v1::reset ( )

inlinevirtual

Resets the Element so that is is in a standard and safe situation. Different from Element::init which configure the Element. Element::reset() is more an Emergency pull. It is often/usually called by the recursiveInitElement method at the start of the program.

Implements Element.

Definition at line 48 of file FEB_v1.h.

References Object::debug(), m_seqPga, Object::name(), and SeqPGA::reset().

               {
    m_seqPga->reset();
    debug("FEB_v1 "+name()+" reset.","FEB_v1::reset");
  };

resetFE()

StatusCode FEB_v1::resetFE

(

int

fe

)

Definition at line 491 of file FEB_v1.cpp.

References Object::info(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiWrite().

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                                {  
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  StatusCode val = (m_seqPga->spiWrite(11,0));
  info("Reset FE "+itos(fe),"FEB_v1::resetFE");
  return val;
}

resetFifoInjectFE()

StatusCode FEB_v1::resetFifoInjectFE

(

int

fe

)

Definition at line 481 of file FEB_v1.cpp.

References Object::info(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiWrite().

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                                          {  
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  StatusCode val = (m_seqPga->spiWrite(13,0));
  info("Reset FIFO Inject FE "+itos(fe),"FEB_v1::resetFifoInjectFE");
  return val;
}

resetFifoSpyFE()

StatusCode FEB_v1::resetFifoSpyFE

(

int

fe

)

Definition at line 471 of file FEB_v1.cpp.

References Object::debug(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiWrite().

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                                       {  
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  StatusCode val = (m_seqPga->spiWrite(12,0));
  debug("Reset FIFO Spy FE "+itos(fe),"FEB_v1::resetFifoSpyFE");
  return val;
}

resetSpi()

void FEB_v1::resetSpi ( )

inline

Definition at line 53 of file FEB_v1.h.

References Object::debug(), m_seqPga, Object::name(), and SeqPGA::resetSpi().

Referenced by BOOST_PYTHON_MODULE().

                  {
    m_seqPga->resetSpi();
    debug("FEB_v1 "+name()+" reset Spi.","FEB_v1::resetSpi");
  };

seqPga()

SeqPGA* FEB_v1::seqPga ( )

inline

Definition at line 63 of file FEB_v1.h.

References calibCte(), clock80MHzFallingEdge(), clockFallingEdge(), disableSubtract(), enableBXIDReset(), gain4(), globalPseudoPMEnable(), injectModeFE(), latency(), m_seqPga, oldSubtract(), probeEnable(), pseudoADCEnable(), pseudoPMEnable(), setCalibCte(), setClock80MHzFallingEdge(), setClockFallingEdge(), setDisableSubtract(), setEnableBXIDReset(), setGain4(), setGlobalPseudoPMEnable(), setInjectModeFE(), setLatency(), setOldSubtract(), setProbeEnable(), setPseudoADCEnable(), setPseudoPMEnable(), setSpareForTrigEnable(), setSpyModeFE(), setSpyModeSeq(), setStopInjLoop(), setTestDuration(), setThreshold(), spareForTrigEnable(), spyModeFE(), spyModeSeq(), stopInjLoop(), testDuration(), and threshold().

Referenced by BOOST_PYTHON_MODULE(), FEB_v1(), TestSPI::initialize(), TestI2C::initialize(), and TestUSB::initialize().

                  {
    return m_seqPga;
  }

setCalibCte()

StatusCode FEB_v1::setCalibCte	(	int	fe,
		int	ch,
		int	value
	)

Definition at line 982 of file FEB_v1.cpp.

References data(), StatusCode::FAILURE, Object::info(), StatusCode::isFailure(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), SeqPGA::spiWrite(), StatusCode::SUCCESS, and Object::warning().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                                         {
  if (ch>3){
    warning("try to configure a channel that does not exist.","FEB_v1::setClockFallingEdge");
    return StatusCode::FAILURE;
  }
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  unsigned int data=m_seqPga->spiRead(4+ch);
  data = data & (0xFF00);
  data += value;
  if (m_seqPga->spiWrite(4+ch,data).isFailure()){
    return StatusCode::FAILURE;
  }
  info("set Calibration constant "+itos(fe)+" - Ch "+itos(fe)+" : "+itos(value),"FEB_v1::setCalibCte");
  return StatusCode::SUCCESS;
}

setClock80MHzFallingEdge()

StatusCode FEB_v1::setClock80MHzFallingEdge

(

bool

value

)

Definition at line 959 of file FEB_v1.cpp.

References data(), StatusCode::FAILURE, Object::info(), StatusCode::isFailure(), itos(), m_seqAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), SeqPGA::spiWrite(), and StatusCode::SUCCESS.

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                                     {
  m_seqPga->setSpiAdd(m_seqAddress);
  unsigned int data=m_seqPga->spiRead(1);
  data &= 0xFFEF;
  data |= (value<<4) & 0x10;
  if (m_seqPga->spiWrite(1,data).isFailure()){
    return StatusCode::FAILURE;
  }
  info("set Clock 80MHz Falling Edge : "+itos(value),"FEB_v1::setClock80MzFallingEdge");
  return StatusCode::SUCCESS;
}

setClockFallingEdge()

StatusCode FEB_v1::setClockFallingEdge	(	int	fe,
		int	ch,
		bool	value
	)

Definition at line 933 of file FEB_v1.cpp.

References data(), StatusCode::FAILURE, Object::info(), StatusCode::isFailure(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), SeqPGA::spiWrite(), StatusCode::SUCCESS, and Object::warning().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                                                  {
  if (ch>3){
    warning("try to configure a channel that does not exist.","FEB_v1::setClockFallingEdge");
    return StatusCode::FAILURE;
  }
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  unsigned int data=m_seqPga->spiRead(4+ch);
  if (value)  data |= 1 << 8  ;
  else        data &= ~(1<<8) ;
  if (m_seqPga->spiWrite(4+ch,data).isFailure()){
    return StatusCode::FAILURE;
  }
  info("set Clock Falling Edge FPGA "+itos(fe)+" - Ch "+itos(ch)+" : "+itos(value),"FEB_v1::setClockFallingEdge");
  return StatusCode::SUCCESS;
}

setDisableSubtract()

StatusCode FEB_v1::setDisableSubtract	(	int	fe,
		bool	value
	)

Definition at line 742 of file FEB_v1.cpp.

References data(), StatusCode::FAILURE, Object::info(), StatusCode::isFailure(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), SeqPGA::spiWrite(), and StatusCode::SUCCESS.

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                                         {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  unsigned int data=m_seqPga->spiRead(1);
  data = data & 0xFDFF;
  data += (value<<9);
  if (m_seqPga->spiWrite(1,data).isFailure()){
    return StatusCode::FAILURE;
  }
  info("set Disable Subtraction "+itos(fe)+": "+itos(value),"FEB_v1::setDisableSubtract");
  return StatusCode::SUCCESS;
}

setEnableBXIDReset()

StatusCode FEB_v1::setEnableBXIDReset

(

bool

value

)

Definition at line 765 of file FEB_v1.cpp.

References data(), m_seqAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), and SeqPGA::spiWrite().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                                 {
  m_seqPga->setSpiAdd(m_seqAddress);
  unsigned int data=m_seqPga->spiRead(1);
  if (value) data |=  2048 ;
  else       data &= ~2048 ;
  return m_seqPga->spiWrite(1,data);
}

setExtTrig()

StatusCode FEB_v1::setExtTrig ( bool  trig )

inline

Definition at line 110 of file FEB_v1.h.

References m_seqPga, and SeqPGA::setExtTrig().

Referenced by BOOST_PYTHON_MODULE().

{ return m_seqPga->setExtTrig( trig ); }

setGain4()

StatusCode FEB_v1::setGain4	(	int	fe,
		int	ch,
		bool	value
	)

Definition at line 829 of file FEB_v1.cpp.

References data(), StatusCode::FAILURE, Object::info(), StatusCode::isFailure(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), SeqPGA::spiWrite(), StatusCode::SUCCESS, and Object::warning().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                                       {
  if (ch>3){
    warning("try to configure a channel that does not exist.","FEB_v1::setGain4");
    return StatusCode::FAILURE;
  }
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  unsigned int data=m_seqPga->spiRead(4+ch);
  if (value)  data |= 1 << 11 ;
  else        data &= ~(1<<11) ;
  if (m_seqPga->spiWrite(4+ch,data).isFailure()){
    return StatusCode::FAILURE;
  }
  info("set Gain4 FE "+itos(fe)+" - Ch "+itos(ch)+" : "+itos(value),"FEB_v1::setGain4");
  return StatusCode::SUCCESS;
}

setGbt80MHzClkEport()

StatusCode FEB_v1::setGbt80MHzClkEport

(

int

gbt

)

Definition at line 1338 of file FEB_v1.cpp.

References StatusCode::FAILURE, SeqPGA::i2cWrite(), Object::info(), StatusCode::isFailure(), itos(), m_gbtAddress, m_seqPga, SeqPGA::setI2cAdd(), StatusCode::SUCCESS, and Object::warning().

Referenced by BOOST_PYTHON_MODULE(), and ramSpy().

                                             {
  m_seqPga->setI2cAdd(m_gbtAddress[gbt]);
  int wd = (1<<4)+(1<<2)+1;
  if (m_seqPga->i2cWrite(63, wd).isFailure()){
    warning("Cannot set GBT Eport clock at 80MHz for GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(87, wd).isFailure()){
    warning("Cannot set GBT Eport clock at 80MHz for GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(111, wd).isFailure()){
    warning("Cannot set GBT Eport clock at 80MHz for GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(135, wd).isFailure()){
    warning("Cannot set GBT Eport clock at 80MHz for GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(159, wd).isFailure()){
    warning("Cannot set GBT Eport clock at 80MHz for GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(183, wd).isFailure()){
    warning("Cannot set GBT Eport clock at 80MHz for GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(207, wd).isFailure()){
    warning("Cannot set GBT Eport clock at 80MHz for GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  info("Setting Eport clock at 80MHz for the GBT "+itos(gbt));
  return StatusCode::SUCCESS;
}

setGbtClockStrength()

StatusCode FEB_v1::setGbtClockStrength	(	int	gbt,
		int	strength
	)

Definition at line 1528 of file FEB_v1.cpp.

References StatusCode::FAILURE, SeqPGA::i2cWrite(), Object::info(), StatusCode::isFailure(), itos(), m_gbtAddress, m_seqPga, SeqPGA::setI2cAdd(), StatusCode::SUCCESS, and Object::warning().

Referenced by BOOST_PYTHON_MODULE(), and ramSpy().

                                                           {
  info("Setting the gbt "+itos(gbt)+" output clock strength to "+itos(strength));
  m_seqPga->setI2cAdd(m_gbtAddress[gbt]);
  int wd = ((strength&0xF)<<4)+(strength&0xF);
  int ports[4]={ 269, 270, 271, 272 };
  for (int i=0; i<4; ++i){
    if (m_seqPga->i2cWrite(ports[i], wd).isFailure()){
      warning("Cannot set gbt output clock strength ("+itos(ports[i])+") of GBT "+itos(gbt));
      return StatusCode::FAILURE;
    }
  };
  return StatusCode::SUCCESS;
}

setGbtDataPath()

StatusCode FEB_v1::setGbtDataPath	(	int	gbt,
		int	tx0,
		int	tx1,
		int	tx2
	)

Definition at line 1220 of file FEB_v1.cpp.

References StatusCode::FAILURE, SeqPGA::i2cWrite(), Object::info(), StatusCode::isFailure(), itos(), m_gbtAddress, m_seqPga, SeqPGA::setI2cAdd(), StatusCode::SUCCESS, and Object::warning().

Referenced by BOOST_PYTHON_MODULE(), and ramSpy().

                                                                   {
  m_seqPga->setI2cAdd(m_gbtAddress[gbt]);
  int wd = (tx2<<4)+(tx1<<2)+tx0; 
  if (m_seqPga->i2cWrite(29, wd).isFailure()){
    warning("Cannot set data path (A) of the GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(30, wd).isFailure()){
    warning("Cannot set data path (B) of the GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(31, wd).isFailure()){
    warning("Cannot set data path (C) of the GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  info("Setting data path of the GBT "+itos(gbt)+" to "+itos(wd));
  return StatusCode::SUCCESS;
}

setGbtDLLEport()

StatusCode FEB_v1::setGbtDLLEport

(

int

gbt

)

Definition at line 1390 of file FEB_v1.cpp.

References StatusCode::FAILURE, SeqPGA::i2cWrite(), Object::info(), StatusCode::isFailure(), itos(), m_gbtAddress, m_seqPga, SeqPGA::setI2cAdd(), StatusCode::SUCCESS, and Object::warning().

Referenced by BOOST_PYTHON_MODULE(), and ramSpy().

                                        {
  m_seqPga->setI2cAdd(m_gbtAddress[gbt]);
  int wd1 = 0b1011;
  int wd0 = (wd1<<4)+wd1;
  if (m_seqPga->i2cWrite(64, wd0).isFailure()){
    warning("Cannot set DLL charge pump (64) for GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(65, wd1).isFailure()){
    warning("Cannot set DLL charge pump (65) for GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(88, wd0).isFailure()){
    warning("Cannot set DLL charge pump (88) for GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(89, wd1).isFailure()){
    warning("Cannot set DLL charge pump (89) for GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(112, wd0).isFailure()){
    warning("Cannot set DLL charge pump (112) for GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(113, wd1).isFailure()){
    warning("Cannot set DLL charge pump (113) for GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(136, wd0).isFailure()){
    warning("Cannot set DLL charge pump (136) for GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(137, wd1).isFailure()){
    warning("Cannot set DLL charge pump (137) for GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(160, wd0).isFailure()){
    warning("Cannot set DLL charge pump (160) for GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(161, wd1).isFailure()){
    warning("Cannot set DLL charge pump (161) for GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(184, wd0).isFailure()){
    warning("Cannot set DLL charge pump (184) for GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(185, wd1).isFailure()){
    warning("Cannot set DLL charge pump (185) for GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(208, wd0).isFailure()){
    warning("Cannot set DLL charge pump (208) for GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(209, wd1).isFailure()){
    warning("Cannot set DLL charge pump (209) for GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(231, wd0).isFailure()){
    warning("Cannot set DLL charge pump (231) for GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(232, wd1).isFailure()){
    warning("Cannot set DLL charge pump (232) for GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(233, 7).isFailure()){
    warning("Cannot set DLL charge pump (232) for GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  info("Setting DLL Eport for the GBT "+itos(gbt));
  info("Setting Phase aligner lock detection mode for GBT "+itos(gbt));
  return StatusCode::SUCCESS;
}

setGbtEnableEport()

StatusCode FEB_v1::setGbtEnableEport	(	int	gbt,
		bool	enable
	)

Definition at line 1491 of file FEB_v1.cpp.

References StatusCode::FAILURE, SeqPGA::i2cWrite(), Object::info(), StatusCode::isFailure(), itos(), m_gbtAddress, m_seqPga, SeqPGA::setI2cAdd(), StatusCode::SUCCESS, and Object::warning().

Referenced by BOOST_PYTHON_MODULE(), and ramSpy().

                                                        {
  m_seqPga->setI2cAdd(m_gbtAddress[gbt]);
  int wd = 0xff;
  if (!enable){
    wd = 0;
  }
  int ports[21]={81, 82, 83, 105, 106, 107, 129, 130, 131, 153, 154,
         155, 177, 178, 179, 201, 202, 203, 225, 226, 227};
  for (int i=0; i<21; ++i){
    if (m_seqPga->i2cWrite(ports[i], wd).isFailure()){
      warning("Cannot set (en)able eport ("+itos(ports[i])+") of GBT "+itos(gbt));
      return StatusCode::FAILURE;
    }
  };
  if (enable){
    info("Enabling Eports for the GBT "+itos(gbt));
  }
  else
  {
    info("Disabling Eports for the GBT "+itos(gbt));
  }
  return StatusCode::SUCCESS;
}

setGbtMode()

StatusCode FEB_v1::setGbtMode	(	int	gbt,
		int	mode
	)

Definition at line 1184 of file FEB_v1.cpp.

References StatusCode::FAILURE, SeqPGA::i2cWrite(), Object::info(), StatusCode::isFailure(), itos(), m_gbtAddress, m_seqPga, SeqPGA::setI2cAdd(), StatusCode::SUCCESS, and Object::warning().

Referenced by BOOST_PYTHON_MODULE(), and ramSpy().

                                               {
  std::string modes[4] = {
    "Normal operating mode",
    "Fixed pattern mode",
    "30 bit counter",
    "7 bit shift register"
  };
  m_seqPga->setI2cAdd(m_gbtAddress[gbt]);
  if (m_seqPga->i2cWrite(28, mode).isFailure()){
    warning("Cannot set Tx mode of the GBT "+itos(gbt)+
     " to "+modes[mode]+" ["+itos(mode)+"]");
    return StatusCode::FAILURE;
  }
  info("Setting Tx mode of the GBT "+itos(gbt)+
       " to "+modes[mode]+" ["+itos(mode)+"]");
  return StatusCode::SUCCESS;  
}

setGbtTermEport()

StatusCode FEB_v1::setGbtTermEport	(	int	gbt,
		bool	term
	)

Definition at line 1284 of file FEB_v1.cpp.

References StatusCode::FAILURE, SeqPGA::i2cWrite(), Object::info(), StatusCode::isFailure(), itos(), m_gbtAddress, m_seqPga, SeqPGA::setI2cAdd(), StatusCode::SUCCESS, and Object::warning().

Referenced by BOOST_PYTHON_MODULE(), and ramSpy().

                                                    {
  m_seqPga->setI2cAdd(m_gbtAddress[gbt]);
  int wd = 0xff;
  if (!term){
    wd = 0;
  }
  if (m_seqPga->i2cWrite(320, wd).isFailure()){
    warning("Cannot set GBT Term Eport 320 of the GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(321, wd).isFailure()){
    warning("Cannot set GBT Term Eport 320 of the GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(322, wd).isFailure()){
    warning("Cannot set GBT Term Eport 320 of the GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(323, wd).isFailure()){
    warning("Cannot set GBT Term Eport 320 of the GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(324, wd).isFailure()){
    warning("Cannot set GBT Term Eport 320 of the GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(325, wd).isFailure()){
    warning("Cannot set GBT Term Eport 320 of the GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  if (m_seqPga->i2cWrite(326, wd).isFailure()){
    warning("Cannot set GBT Term Eport 320 of the GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  info("Setting Eport Termination of the GBT "+itos(gbt)+" to "+itos(wd&1));
  return StatusCode::SUCCESS;
}

setGbtTrackMode()

StatusCode FEB_v1::setGbtTrackMode	(	int	gbt,
		int	mode
	)

Definition at line 1252 of file FEB_v1.cpp.

References StatusCode::FAILURE, SeqPGA::i2cWrite(), Object::info(), StatusCode::isFailure(), itos(), m_gbtAddress, m_seqPga, SeqPGA::setI2cAdd(), StatusCode::SUCCESS, and Object::warning().

Referenced by BOOST_PYTHON_MODULE(), and ramSpy().

                                                   {
  std::string str_mode[3]={
    "Static phase selection",
    "Training mode",
    "Automatic phase tracking"
  };
  m_seqPga->setI2cAdd(m_gbtAddress[gbt]);
  int wd = (mode<<4)+(mode<<2)+mode;
  if (m_seqPga->i2cWrite(62, wd).isFailure()){
    warning("Cannot set GBT track mode of the GBT "+itos(gbt));
    return StatusCode::FAILURE;
  }
  info("Setting track mode of the GBT "+itos(gbt)+" to "+itos(wd)+" -> "+str_mode[mode&0b11]);
  return StatusCode::SUCCESS;
}

setGlobalPseudoPMEnable()

StatusCode FEB_v1::setGlobalPseudoPMEnable	(	int	fe,
		bool	value
	)

Definition at line 910 of file FEB_v1.cpp.

References data(), StatusCode::FAILURE, Object::info(), StatusCode::isFailure(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), SeqPGA::spiWrite(), and StatusCode::SUCCESS.

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                                              {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  unsigned int data=m_seqPga->spiRead(1);
  if (value)  data |= 1 << 10 ;
  else        data &= ~(1<<10) ;
  if (m_seqPga->spiWrite(1,data).isFailure()){
    return StatusCode::FAILURE;
  }
  info("set GlobalPseudoPMEnable FE "+itos(fe)+" : "+itos(value),"FEB_v1::setGlobalPseudoPMEnable");
  return StatusCode::SUCCESS;
}

setInjectModeFE()

StatusCode FEB_v1::setInjectModeFE	(	int	fe,
		bool	value
	)

Definition at line 806 of file FEB_v1.cpp.

References data(), StatusCode::FAILURE, Object::info(), StatusCode::isFailure(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), SeqPGA::spiWrite(), and StatusCode::SUCCESS.

Referenced by BOOST_PYTHON_MODULE(), readFifoInjectFE(), and seqPga().

                                                      {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  unsigned int data=m_seqPga->spiRead(1);
  if (value)  data |= 1 << 10 ;
  else        data &= ~(1<<10) ;
  if (m_seqPga->spiWrite(1,data).isFailure()){
    return StatusCode::FAILURE;
  }
  info("set Inject Mode FE "+itos(fe)+": "+itos(value),"FEB_v1::injectModeFE");
  return StatusCode::SUCCESS;
}

setLatency()

StatusCode FEB_v1::setLatency	(	int	fe,
		int	value
	)

Definition at line 719 of file FEB_v1.cpp.

References data(), StatusCode::FAILURE, Object::info(), StatusCode::isFailure(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), SeqPGA::spiWrite(), and StatusCode::SUCCESS.

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                                {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  unsigned int data=m_seqPga->spiRead(1);
  data = data & 0xFF00;
  data += value&0xFF;
  if (m_seqPga->spiWrite(1,data).isFailure()){
    return StatusCode::FAILURE;
  }
  info("set Latency "+itos(fe)+": "+itos(value),"FEB_v1::setLatency");
  return StatusCode::SUCCESS;
}

setLatencyLLT()

StatusCode FEB_v1::setLatencyLLT

(

int

val

)

Definition at line 1026 of file FEB_v1.cpp.

References StatusCode::FAILURE, StatusCode::isFailure(), latency(), m_latency0, m_seqAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), SeqPGA::spiWrite(), and StatusCode::SUCCESS.

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                                       {
  m_seqPga->setSpiAdd(m_seqAddress);
  int latency = m_seqPga->spiRead(3);
  latency &=0xFFF;
  latency |=((val&0xF)<<12);
   if (m_seqPga->spiWrite(3,latency).isFailure()){
    return StatusCode::FAILURE;
  }
   m_latency0=val;
  return StatusCode::SUCCESS;   
}

setLatencyLLTCorner()

StatusCode FEB_v1::setLatencyLLTCorner

(

int

val

)

Definition at line 1074 of file FEB_v1.cpp.

References StatusCode::FAILURE, StatusCode::isFailure(), latency(), m_latency3, m_seqAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), SeqPGA::spiWrite(), and StatusCode::SUCCESS.

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                                             {
  m_seqPga->setSpiAdd(m_seqAddress);
  int latency = m_seqPga->spiRead(3);
  latency &=0xFFF0;
  latency |=val&0xF;
   if (m_seqPga->spiWrite(3,latency).isFailure()){
    return StatusCode::FAILURE;
  }
   m_latency3=val;
  return StatusCode::SUCCESS;   
}

setLatencyLLTSideNb()

StatusCode FEB_v1::setLatencyLLTSideNb

(

int

val

)

Definition at line 1058 of file FEB_v1.cpp.

References StatusCode::FAILURE, StatusCode::isFailure(), latency(), m_latency2, m_seqAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), SeqPGA::spiWrite(), and StatusCode::SUCCESS.

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                                             {
  m_seqPga->setSpiAdd(m_seqAddress);
  int latency = m_seqPga->spiRead(3);
  latency &=0xFF0F;
  latency |=((val&0xF)<<4);
   if (m_seqPga->spiWrite(3,latency).isFailure()){
    return StatusCode::FAILURE;
  }
   m_latency2=val;
  return StatusCode::SUCCESS;   
}

setLatencyLLTUpNb()

StatusCode FEB_v1::setLatencyLLTUpNb

(

int

val

)

Definition at line 1042 of file FEB_v1.cpp.

References StatusCode::FAILURE, StatusCode::isFailure(), latency(), m_latency1, m_seqAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), SeqPGA::spiWrite(), and StatusCode::SUCCESS.

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                                           {
  m_seqPga->setSpiAdd(m_seqAddress);
  int latency = m_seqPga->spiRead(3);
  latency &=0xF0FF;
  latency |=((val&0xF)<<8);
   if (m_seqPga->spiWrite(3,latency).isFailure()){
    return StatusCode::FAILURE;
  }
   m_latency1=val;
  return StatusCode::SUCCESS;   
}

setMaskLLT()

StatusCode FEB_v1::setMaskLLT	(	int	ch,
		bool	val
	)

Definition at line 1115 of file FEB_v1.cpp.

References StatusCode::FAILURE, StatusCode::isFailure(), m_mask0, m_mask1, m_seqAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), SeqPGA::spiWrite(), and StatusCode::SUCCESS.

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                                             {
  m_seqPga->setSpiAdd(m_seqAddress);
  if (ch<16) {
    m_mask0=m_seqPga->spiRead(4);
    if (val)  m_mask0 |= 1 << ch  ;
    else      m_mask0 &= ~(1<<ch) ;
        if (m_seqPga->spiWrite(4,m_mask0).isFailure()){
      return StatusCode::FAILURE;
    }
    return StatusCode::SUCCESS;  
  }
  else if (ch<32) {
    m_mask1=m_seqPga->spiRead(5);
    if (val)  m_mask1 |= 1 << (ch-16)  ;
    else      m_mask1 &= ~(1<<(ch-16)) ;
    if (m_seqPga->spiWrite(5,m_mask1).isFailure()){
      return StatusCode::FAILURE;
    }
    return StatusCode::SUCCESS;  
  }
  return StatusCode::FAILURE;  
}

setMaskLLTCorner()

StatusCode FEB_v1::setMaskLLTCorner

(

bool

val

)

Definition at line 1141 of file FEB_v1.cpp.

References StatusCode::FAILURE, StatusCode::isFailure(), m_mask2, m_seqAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), SeqPGA::spiWrite(), and StatusCode::SUCCESS.

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                                           {
  m_seqPga->setSpiAdd(m_seqAddress);
  m_mask2=m_seqPga->spiRead(6);
  if (val)  m_mask2 |= (1 << 3)  ;
  else      m_mask2 &= ~(1<<3) ;
  if (m_seqPga->spiWrite(6,m_mask2).isFailure()){
    return StatusCode::FAILURE;
  }
  return StatusCode::SUCCESS;  
}

setMaskLLTSideNb()

StatusCode FEB_v1::setMaskLLTSideNb	(	int	ch,
		bool	val
	)

Definition at line 1169 of file FEB_v1.cpp.

References StatusCode::FAILURE, StatusCode::isFailure(), m_mask2, m_seqAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), SeqPGA::spiWrite(), and StatusCode::SUCCESS.

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                                                   {
  m_seqPga->setSpiAdd(m_seqAddress);
  m_mask2=m_seqPga->spiRead(6);
  if (val)  m_mask2 |= (1 << (4+ch))  ;
  else      m_mask2 &= ~(1<< (4+ch)) ;
  if (m_seqPga->spiWrite(6,m_mask2).isFailure()){
    return StatusCode::FAILURE;
  }
  return StatusCode::SUCCESS;
}

setMaskLLTUpNb()

StatusCode FEB_v1::setMaskLLTUpNb	(	int	ch,
		bool	val
	)

Definition at line 1155 of file FEB_v1.cpp.

References StatusCode::FAILURE, StatusCode::isFailure(), m_mask2, m_seqAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), SeqPGA::spiWrite(), and StatusCode::SUCCESS.

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                                                 {
  m_seqPga->setSpiAdd(m_seqAddress);
  m_mask2=m_seqPga->spiRead(6);
  if (val)  m_mask2 |= (1 << (12+ch))  ;
  else      m_mask2 &= ~(1<< (12+ch)) ;
  if (m_seqPga->spiWrite(6,m_mask2).isFailure()){
    return StatusCode::FAILURE;
  }
  return StatusCode::SUCCESS;  
}

setOldSubtract()

StatusCode FEB_v1::setOldSubtract	(	int	fe,
		bool	value
	)

Definition at line 783 of file FEB_v1.cpp.

References data(), StatusCode::FAILURE, Object::info(), StatusCode::isFailure(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), SeqPGA::spiWrite(), and StatusCode::SUCCESS.

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                                     {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  unsigned int data=m_seqPga->spiRead(1);
  data = data & 0xFEFF;
  data += (value<<8);
  if (m_seqPga->spiWrite(1,data).isFailure()){
    return StatusCode::FAILURE;
  }
  info("set Old Subtraction mode "+itos(fe)+": "+itos(value),"FEB_v1::setOldSubtract");
  return StatusCode::SUCCESS;
}

setOutputEport() [1/2]

StatusCode FEB_v1::setOutputEport	(	int	gbt,
		int	latency,
		int	clock
	)

Definition at line 1564 of file FEB_v1.cpp.

References data(), StatusCode::FAILURE, Object::info(), StatusCode::isFailure(), itos(), m_seqAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiWrite(), StatusCode::SUCCESS, and Object::warning().

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                                                                {
  m_seqPga->setSpiAdd(m_seqAddress);
  unsigned int data=(clock&0xFF)+((latency&0xFF)<<8);
  if (m_seqPga->spiWrite(20+gbt,data).isFailure()){
    warning("Cannot set Output EPort phase FPGA Seq - GBT "+itos(gbt)+" : "+itos(data),"FEB_v1::setOutputEPort");
    return StatusCode::FAILURE;
  }
  info("set Output EPort phase FPGA Seq - GBT "+itos(gbt)+" : "+itos(data),"FEB_v1::setOutputEPort");
  return StatusCode::SUCCESS;
}

setOutputEport() [2/2]

StatusCode FEB_v1::setOutputEport	(	int	fe,
		int	ch,
		int	latency,
		int	clock
	)

Definition at line 1589 of file FEB_v1.cpp.

References data(), StatusCode::FAILURE, Object::info(), StatusCode::isFailure(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiWrite(), StatusCode::SUCCESS, and Object::warning().

                                                                       {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  unsigned int data=(clock&0x3F)+((latency&0x3F)<<6);
  if (m_seqPga->spiWrite(14+ch,data).isFailure()){
    warning("Cannot set Output EPort phase FPGA"+itos(fe)+" - Ch "+itos(ch)+" : "+itos(data),"FEB_v1::setOutputEPort");
    return StatusCode::FAILURE;
  }
  info("set Output EPort phase FPGA "+itos(fe)+" - Ch "+itos(ch)+" : "+itos(data),"FEB_v1::setOutputEPort");
  return StatusCode::SUCCESS;
}

setProbeEnable()

StatusCode FEB_v1::setProbeEnable	(	int	fe,
		bool	enable
	)

Definition at line 603 of file FEB_v1.cpp.

References Object::info(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), and SeqPGA::spiWrite().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                                     {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  int val = m_seqPga->spiRead(2);
  if (enable) {
    info("Enabling Seq PGA probes","FEB_v1::setProbeEnable");
    val |= 0xF;
  }
  else {
    info("Disabling Seq PGA probes","FEB_v1::setProbeEnable");
    val &=0xFFF0;
  }
  return m_seqPga->spiWrite(2,val);
}

setPseudoADCEnable()

StatusCode FEB_v1::setPseudoADCEnable	(	int	fe,
		int	ch,
		bool	value
	)

Definition at line 856 of file FEB_v1.cpp.

References data(), StatusCode::FAILURE, Object::info(), StatusCode::isFailure(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), SeqPGA::spiWrite(), StatusCode::SUCCESS, and Object::warning().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                                                 {
  if (ch>3){
    warning("try to configure a channel that does not exist.","FEB_v1::setPseudoADCEnable");
    return StatusCode::FAILURE;
  }
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  unsigned int data=m_seqPga->spiRead(4+ch);
  if (value)  data |= 1 << 10 ;
  else        data &= ~(1<<10) ;
  if (m_seqPga->spiWrite(4+ch,data).isFailure()){
    return StatusCode::FAILURE;
  }
  info("set PseudoADCEnable "+itos(fe)+" - Ch "+itos(ch)+" : "+itos(value),"FEB_v1::setPseudoADCEnable");
  return StatusCode::SUCCESS;
}

setPseudoPMEnable()

StatusCode FEB_v1::setPseudoPMEnable	(	int	fe,
		int	ch,
		bool	value
	)

Definition at line 883 of file FEB_v1.cpp.

References data(), StatusCode::FAILURE, Object::info(), StatusCode::isFailure(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), SeqPGA::spiWrite(), StatusCode::SUCCESS, and Object::warning().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                                                {
  if (ch>3){
    warning("try to configure a channel that does not exist.","FEB_v1::setPseudoPMEnable");
    return StatusCode::FAILURE;
  }
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  unsigned int data=m_seqPga->spiRead(4+ch);
  if (value)  data |= 1 << 9 ;
  else        data &= ~(1<<9) ;
  if (m_seqPga->spiWrite(4+ch,data).isFailure()){
    return StatusCode::FAILURE;
  }
  info("set PseudoPMEnable FE "+itos(fe)+" - Ch "+itos(ch)+" : "+itos(value),"FEB_v1::setPseudoPMEnable");
  return StatusCode::SUCCESS;
}

setSpareForTrigEnable()

StatusCode FEB_v1::setSpareForTrigEnable	(	int	fe,
		int	enable
	)

Definition at line 631 of file FEB_v1.cpp.

References Object::info(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), and SeqPGA::spiWrite().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                                           {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  int val = m_seqPga->spiRead(2) & 0xFF0F;
  info("SetSpareForTrig FE "+itos(fe)+" : "+itos(enable),"FEB_v1::setSpareForTrigEnable");
  val |= (enable<<4)&0xF0;
  return m_seqPga->spiWrite(2,val);
}

setSpyModeFE()

StatusCode FEB_v1::setSpyModeFE	(	int	fe,
		bool	value
	)

Definition at line 672 of file FEB_v1.cpp.

References data(), StatusCode::FAILURE, Object::info(), StatusCode::isFailure(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), SeqPGA::spiWrite(), and StatusCode::SUCCESS.

Referenced by BOOST_PYTHON_MODULE(), seqPga(), and writeFifoSpyFE().

                                                   {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  unsigned int data=m_seqPga->spiRead(1);
  if (value)  data |= 1 << 14  ;
  else        data &= ~(1<<14) ;
  if (m_seqPga->spiWrite(1,data).isFailure()){
    return StatusCode::FAILURE;
  }
  info("set Spy Mode FE "+itos(fe)+" : "+itos(value)+" setup0="+itos(data),"FEB_v1::spyModeFE");
  return StatusCode::SUCCESS;
}

setSpyModeSeq()

StatusCode FEB_v1::setSpyModeSeq

(

bool

value

)

Definition at line 653 of file FEB_v1.cpp.

References data(), m_seqAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), and SeqPGA::spiWrite().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                            {
  m_seqPga->setSpiAdd(m_seqAddress);
  unsigned int data=m_seqPga->spiRead(1);
  if (value)  data |= 32  ;
  else        data &= ~32 ;
  return m_seqPga->spiWrite(1,data);
}

setStopInjLoop()

StatusCode FEB_v1::setStopInjLoop

(

bool

stoploop

)

Definition at line 558 of file FEB_v1.cpp.

References data(), StatusCode::FAILURE, StatusCode::isFailure(), itos(), m_feAddress, m_seqAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), SeqPGA::spiWrite(), StatusCode::SUCCESS, and Object::warning().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                              {
  m_seqPga->setSpiAdd(m_seqAddress);
  int data = m_seqPga->spiRead(12);
  data &= 0x0FFF;
  data |= (stoploop<<12);
  if (m_seqPga->spiWrite(12,data).isFailure()){
    warning("Cannot write test sequence loop for Seq pga ","FEB_v1::setStopInjLoop");
    return StatusCode::FAILURE;
  }
  for (int fe=0; fe<8; ++fe){
    m_seqPga->setSpiAdd(m_feAddress[fe]);
    data = m_seqPga->spiRead(3);
    data &= 0x0FFF;
    data |= (stoploop<<12);
    if (m_seqPga->spiWrite(3,data).isFailure()){
      warning("Cannot write test loop for FE pga "+ itos(fe),
          "FEB_v1::setStopInjLoop");
      return StatusCode::FAILURE;
    }
  }
  return StatusCode::SUCCESS;
}

setTestDuration()

StatusCode FEB_v1::setTestDuration

(

int

duration

)

Definition at line 511 of file FEB_v1.cpp.

References data(), StatusCode::FAILURE, StatusCode::isFailure(), itos(), m_feAddress, m_seqAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), SeqPGA::spiWrite(), StatusCode::SUCCESS, and Object::warning().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                              {
  m_seqPga->setSpiAdd(m_seqAddress);
  int data = m_seqPga->spiRead(12);
  data &= 0xFC00;
  data |= (duration&0x3FF);
  if (m_seqPga->spiWrite(12,data).isFailure()){
    warning("Cannot write test sequence duration for Seq pga ","FEB_v1::setTestDuration");
    return StatusCode::FAILURE;
  }
  for (int fe=0; fe<8; ++fe){
    m_seqPga->setSpiAdd(m_feAddress[fe]);
    data = m_seqPga->spiRead(3);
    data &= 0xFC00;
    data |= (duration&0x3FF);
    if (m_seqPga->spiWrite(3,data).isFailure()){
      warning("Cannot write test sequence duration for FE pga "+ itos(fe),
          "FEB_v1::setTestDuration");
      return StatusCode::FAILURE;
    }
  }
  return StatusCode::SUCCESS;
}

setThreshold()

StatusCode FEB_v1::setThreshold	(	int	fe,
		int	value
	)

Definition at line 695 of file FEB_v1.cpp.

References data(), StatusCode::FAILURE, Object::info(), StatusCode::isFailure(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiRead(), SeqPGA::spiWrite(), and StatusCode::SUCCESS.

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                                  {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  unsigned int data=m_seqPga->spiRead(1);
  data = data & 0xc7FF;
  data += (value<<11);
  
  if (m_seqPga->spiWrite(1,data).isFailure()){
    return StatusCode::FAILURE;
  }
  info("set Threshold "+itos(fe)+": "+itos(value),"FEB_v1::setThreshold");
  return StatusCode::SUCCESS;
}

spareForTrigEnable()

int FEB_v1::spareForTrigEnable

(

int

fe

)

Definition at line 642 of file FEB_v1.cpp.

References Object::info(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                    {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  int val = ((m_seqPga->spiRead(2))&0xF0)>>4;
  info("spareForTrigEnable for FE "+itos(fe)+" : "+itos(val),"FEB_v1::probeEnable");
  return val;
}

spyModeFE()

bool FEB_v1::spyModeFE

(

int

fe

)

Definition at line 684 of file FEB_v1.cpp.

References Object::info(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                              {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  int val = (m_seqPga->spiRead(1)>>14)&1;
  info("Spy Mode FE "+itos(fe)+": "+itos(val),"FEB_v1::spyModeFE");
  return val;
}

spyModeSeq()

bool FEB_v1::spyModeSeq

(

)

Definition at line 661 of file FEB_v1.cpp.

References Object::info(), itos(), m_seqAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                        {
  m_seqPga->setSpiAdd(m_seqAddress);
  int val = m_seqPga->spiRead(1)&&32 ;
  info("Spy Mode Seq: "+itos(val),"FEB_v1::spyModeSeq");
  return val;
}

statusRegister()

int FEB_v1::statusRegister

(

int

fe

)

Definition at line 501 of file FEB_v1.cpp.

References Object::info(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                                {  
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  int val = (m_seqPga->spiRead(10));
  info("Status register FE "+itos(fe)+": "+itos(val),"FEB_v1::statusRegister");
  return val;
}

stopInjLoop()

bool FEB_v1::stopInjLoop

(

int

fpga

)

Definition at line 584 of file FEB_v1.cpp.

References Object::info(), itos(), m_feAddress, m_seqAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                                {
  bool val;
  if (fpga==-1){
    m_seqPga->setSpiAdd(m_seqAddress);
    val = (m_seqPga->spiRead(12)>>12)&0x1;
    info("Test Length Seq stop Loop: "+itos(val),"FEB_v1::stopInjLoop");
    return val;
  }
  else {
    m_seqPga->setSpiAdd(m_feAddress[fpga]);
    val = (m_seqPga->spiRead(3)>>12)&0x1;
    info("Test Length FE stop Loop : "+itos(fpga)+" "+itos(val),"FEB_v1::stopInjLoop");
    return val;
  }
}

testDuration()

int FEB_v1::testDuration

(

int

fpga

)

Definition at line 537 of file FEB_v1.cpp.

References Object::debug(), itos(), m_feAddress, m_fifoDepth, m_seqAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

Referenced by BOOST_PYTHON_MODULE(), readFifoInjectFE(), readFifoLLT(), readFifoLLTFE(), readFifoSpyFE(), seqPga(), writeDataFifoInjectFE(), writeFifoInjectFE(), writeFifoLLT(), writeFifoLLTFE(), and writeFifoSpyFE().

                                {
  int val=-1;
  if (fpga==-1){
    m_seqPga->setSpiAdd(m_seqAddress);
    val = (m_seqPga->spiRead(12))&0x3FF;
    debug("Test Length Seq: "+itos(val),"FEB_v1::testDuration");
    m_fifoDepth = val;
    return val;
  }
  else {
    m_seqPga->setSpiAdd(m_feAddress[fpga]);
    val = (m_seqPga->spiRead(3))&0x3FF;
    debug("Test Length FE: "+itos(fpga)+" "+itos(val),"FEB_v1::testDuration");
    m_fifoDepth = val;
    return val;
  }
}

testSequence()

StatusCode FEB_v1::testSequence ( )

inline

Definition at line 108 of file FEB_v1.h.

References m_seqPga, and SeqPGA::testSequence().

Referenced by BOOST_PYTHON_MODULE().

{ return m_seqPga->testSequence(); }

threshold()

int FEB_v1::threshold

(

int

fe

)

Definition at line 708 of file FEB_v1.cpp.

References Object::info(), itos(), m_feAddress, m_seqPga, SeqPGA::setSpiAdd(), and SeqPGA::spiRead().

Referenced by BOOST_PYTHON_MODULE(), and seqPga().

                             {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  int val = (m_seqPga->spiRead(1)>>11)&7;
  info("threshold FE"+itos(fe)+": "+itos(val),"FEB_v1::threshold");
  return val;
}

update()

void FEB_v1::update ( )

inlinevirtual

Update the Element configuration from the actual hardware

Implements Element.

Definition at line 61 of file FEB_v1.h.

References Object::info(), and Object::name().

Referenced by AppFrame.AppFrame::deleteHardware(), ConfFrame.ConfFrame::onChange(), GraphFrame.GraphFrame::onChange(), CfgFrame.CfgFrame::onChange(), ConfFrame.ConfFrame::onEdit(), AppFrame.AppFrame::onLoad(), ConfFrame.ConfFrame::onReLoad(), GraphFrame.GraphFrame::onReLoad(), CfgFrame.CfgFrame::onReLoad(), and AppFrame.AppFrame::onReLoad().

{info("FEB_v1 "+name()+". Nothing to do.","FEB_v1::update");};

writeDataFifoInjectFE()

void FEB_v1::writeDataFifoInjectFE	(	int	fe,
		int *	ch0,
		int *	ch1,
		int *	ch2,
		int *	ch3
	)

Definition at line 426 of file FEB_v1.cpp.

References Object::info(), m_feAddress, m_fifo, m_fifoInjectAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiWrite(), and testDuration().

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                                                                                 {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  int depth = testDuration(fe);
  
  info("Injection FIFO 0","FEB_v1::readFifoInjectFE");        
  for (int i=0; i<depth; ++i){m_fifo[0][i]=(ch0[i]&0xFFF)+((ch1[i]<<12)&0xF000);}
  m_seqPga->spiWrite(m_fifoInjectAddress[0], depth, m_fifo[0]);
  info("Injection FIFO 1","FEB_v1::readFifoInjectFE");        
  for (int i=0; i<depth; ++i){m_fifo[1][i]=((ch1[i]>>4)&0xFF)+((ch2[i]<<8)&0xFF00);}
  m_seqPga->spiWrite(m_fifoInjectAddress[1], depth, m_fifo[1]);
  info("Injection FIFO 2","FEB_v1::readFifoInjectFE");        
  for (int i=0; i<depth; ++i){m_fifo[2][i]=((ch2[i]>>8)&0xF)+((ch3[i]<<4)&0xFFF0);}
  m_seqPga->spiWrite(m_fifoInjectAddress[2], depth, m_fifo[2]);
}

writeFifoInjectFE()

void FEB_v1::writeFifoInjectFE	(	int	fe,
		int	pattern
	)

Definition at line 298 of file FEB_v1.cpp.

References Object::info(), m_feAddress, m_fifoInjectAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiWrite(), testDuration(), and Object::warning().

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                                                  {
  m_seqPga->setSpiAdd(m_feAddress[fe]);
  int depth = testDuration(fe);
 
  unsigned int buffer[depth];
  warning("Spi write mode block disabled !!!","FEB_v1::writeFifoInjectFE");        
  switch(pattern){
  default: info ("Incremented pattern injection","FEB_v1::writeFifoInjectFE"); break;
  case 1:  info ("ZERO pattern injection","FEB_v1::writeFifoInjectFE"); break;
  case 2:  info ("ZERO and ONE pattern injection","FEB_v1::writeFifoInjectFE"); break;
  case 10:  info ("Channel 0 - Static ONE pattern injection","FEB_v1::writeFifoInjectFE"); break;
  case 11:  info ("Channel 1 - Static ONE pattern injection","FEB_v1::writeFifoInjectFE"); break;
  case 12:  info ("Channel 2 - Static ONE pattern injection","FEB_v1::writeFifoInjectFE"); break;
  case 13:  info ("Channel 3 - Static ONE pattern injection","FEB_v1::writeFifoInjectFE"); break;
  case 20:  info ("Channel 0 - 1/3 ONE pattern injection","FEB_v1::writeFifoInjectFE"); break;
  case 21:  info ("Channel 1 - 1/3 ONE pattern injection","FEB_v1::writeFifoInjectFE"); break;
  case 22:  info ("Channel 2 - 1/3 ONE pattern injection","FEB_v1::writeFifoInjectFE"); break;
  case 23:  info ("Channel 3 - 1/3 ONE pattern injection","FEB_v1::writeFifoInjectFE"); break;
  case 30:  info ("Channel 0 - 1/3 0xAAA pattern injection","FEB_v1::writeFifoInjectFE"); break;
  case 31:  info ("Channel 1 - 1/3 0xAAA pattern injection","FEB_v1::writeFifoInjectFE"); break;
  case 32:  info ("Channel 2 - 1/3 0xAAA pattern injection","FEB_v1::writeFifoInjectFE"); break;
  case 33:  info ("Channel 3 - 1/3 0xAAA pattern injection","FEB_v1::writeFifoInjectFE"); break;
  case 40:  info ("Channel 0 - pow(2,i), i being the word index modulo 12","FEB_v1::writeFifoInjectFE"); break;
  case 41:  info ("Channel 1 - pow(2,i), i being the word index modulo 12","FEB_v1::writeFifoInjectFE"); break;
  case 42:  info ("Channel 2 - pow(2,i), i being the word index modulo 12","FEB_v1::writeFifoInjectFE"); break;
  case 43:  info ("Channel 3 - pow(2,i), i being the word index modulo 12","FEB_v1::writeFifoInjectFE"); break;
  case 100:  info ("Pulse mode - clock running at 40/16 MHz","FEB_v1::writeFifoInjectFE"); break;
  }

  info("Injection FIFO 0","FEB_v1::writeFifoInjectFE");        
  for (int i=0; i<depth; ++i){
    switch (pattern){
    default: buffer[i]=(i+((i+1)<<12))&0xFFFF; break;
    case 1:   buffer[i]=(0)&0xFFFF; break;
    case 2:   buffer[i]=0xFFFF*(i&1); break;
    case 10:  buffer[i]=0x0FFF; break;
    case 11:  buffer[i]=0xF000; break;
    case 12:  buffer[i]=0; break;
    case 13:  buffer[i]=0; break;
    case 20:  i%4==0?buffer[i]=0x0FFF:buffer[i]=0; break;
    case 21:  i%4==0?buffer[i]=0xF000:buffer[i]=0; break;
    case 22:  buffer[i]=0; break;
    case 23:  buffer[i]=0; break;
    case 30:  i%4==0?buffer[i]=0x0AAA:buffer[i]=0; break;
    case 31:  i%4==0?buffer[i]=0xA000:buffer[i]=0; break;
    case 32:  buffer[i]=0; break;
    case 33:  buffer[i]=0; break;
    case 40:  buffer[i]=int(pow(2,i%12)); break;
    case 41:  buffer[i]=(int(pow(2,i%12))<<12)&0xFFFF; break;
    case 42:  buffer[i]=0; break;
    case 43:  buffer[i]=0; break;
    case 50:  buffer[i]=1; break;
    case 51:  buffer[i]=2; break;
    case 52:  buffer[i]=2048; break;
    case 100: ((i>>4)&0x1)==0 ? buffer[i]=1 : buffer[i]=0; break;
    }
   }
  for (int i=0; i<depth; ++i){
    m_seqPga->spiWrite( m_fifoInjectAddress[0], buffer[i]);
  }
  
  info("Injection FIFO 1","FEB_v1::writeFifoInjectFE");        
  for (int i=0; i<depth; ++i){ 
    switch(pattern){
    default:  buffer[i]=((((i+1)>>4)&0xFF)+((i+2)<<8))&0xFFFF; break;
    case 1:   buffer[i]=(0)&0xFFFF; break;
    case 2:   buffer[i]=0xFFFF*(i&1); break;
    case 10:  buffer[i]=0; break;
    case 11:  buffer[i]=0x00FF; break;
    case 12:  buffer[i]=0xFF00; break;
    case 13:  buffer[i]=0; break;
    case 20:  buffer[i]=0; break;
    case 21:  i%4==0?buffer[i]=0x00FF:buffer[i]=0; break;
    case 22:  i%4==0?buffer[i]=0xFF00:buffer[i]=0; break;
    case 23:  buffer[i]=0; break;
    case 30:  buffer[i]=0; break;
    case 31:  i%4==0?buffer[i]=0x00AA:buffer[i]=0; break;
    case 32:  i%4==0?buffer[i]=0xAA00:buffer[i]=0; break;
    case 33:  buffer[i]=0; break;
    case 40:  buffer[i]=0; break;
    case 41:  buffer[i]=(int(pow(2,i%12))>>4)&0xFF; break;
    case 42:  buffer[i]=(int(pow(2,i%12))<<8)&0xFFFF; break;
    case 43:  buffer[i]=0; break;
    case 50:  buffer[i]=0; break;
    case 51:  buffer[i]=0; break;
    case 52:  buffer[i]=0; break;
    case 100: buffer[i]=0; break;
   }
   }
  for (int i=0; i<depth; ++i){
    m_seqPga->spiWrite( m_fifoInjectAddress[1], buffer[i]);
  }
  
  info("Injection FIFO 2","FEB_v1::writeFifoInjectFE");        
  for (int i=0; i<depth; ++i){ 
    switch(pattern){
    default:  buffer[i]=((((i+2)>>8)&0xF)+((i+3)<<4))&0xFFFF; break;
    case 1:   buffer[i]=(0)&0xFFFF; break;
    case 2:   buffer[i]=0xFFFF*(i&1); break;
    case 10:  buffer[i]=0; break;
    case 11:  buffer[i]=0; break;
    case 12:  buffer[i]=0x000F; break;
    case 13:  buffer[i]=0xFFF0; break;
    case 20:  buffer[i]=0; break;
    case 21:  buffer[i]=0; break;
    case 22:  i%4==0?buffer[i]=0x000F:buffer[i]=0; break;
    case 23:  i%4==0?buffer[i]=0xFFF0:buffer[i]=0; break;
    case 30:  buffer[i]=0; break;
    case 31:  buffer[i]=0; break;
    case 32:  i%4==0?buffer[i]=0x000A:buffer[i]=0; break;
    case 33:  i%4==0?buffer[i]=0xAAA0:buffer[i]=0; break;
    case 40:  buffer[i]=0; break;
    case 41:  buffer[i]=0; break;
    case 42:  buffer[i]=(int(pow(2,i%12))>>8)&0xF; break;
    case 43:  buffer[i]=(int(pow(2,i%12))<<4)&0xFFFF; break;
    case 50:  buffer[i]=0; break;
    case 51:  buffer[i]=0; break;
    case 52:  buffer[i]=0; break;
    case 100: buffer[i]=0; break;    
    }
   }  
  for (int i=0; i<depth; ++i){
    m_seqPga->spiWrite( m_fifoInjectAddress[2], buffer[i]);
  }
}

writeFifoLLT()

void FEB_v1::writeFifoLLT

(

)

Definition at line 283 of file FEB_v1.cpp.

References m_fifo, m_fifoTrigAddress, m_seqAddress, m_seqPga, SeqPGA::setSpiAdd(), SeqPGA::spiWrite(), and testDuration().

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                         {
  m_seqPga->setSpiAdd(m_seqAddress);
  int depth = testDuration(-1);
 
  for (int d=0; d<depth; ++d){
    m_fifo[0][d]=d;
    m_fifo[1][d]=d;
  }
  m_seqPga->spiWrite( m_fifoTrigAddress[0], depth, m_fifo[0] );
  m_seqPga->spiWrite( m_fifoTrigAddress[1], depth, m_fifo[1] );
}

writeFifoLLTFE()

void FEB_v1::writeFifoLLTFE

(

int

fe

)

Definition at line 444 of file FEB_v1.cpp.

References testDuration(), and Object::warning().

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                                  {
  warning("This function is commented.");
  int depth = testDuration(fe);
  /*
  m_seqPga->setSpiAdd( m_feAddress[fe] );
  m_seqPga -> setSpiSubAdd( m_fifoLLTAddress[0] );  
  info("LLT FE FIFO 0","FEB_v1::readFifoLLTFE");        
  for (int d=0; d<depth; ++d){ 
    m_seqPga -> setSpiDataTx(d);
    m_seqPga -> transmitSpi();
  }
  m_seqPga -> setSpiSubAdd( m_fifoLLTAddress[1] );
  for (int d=0; d<depth; ++d){ 
    m_seqPga -> setSpiDataTx(d);
    m_seqPga -> transmitSpi();
  }
  m_seqPga -> setSpiSubAdd( m_fifoLLTAddress[2] );
  for (int d=0; d<depth; ++d){ 
    m_seqPga -> setSpiDataTx(d);
    m_seqPga -> transmitSpi();
    }
*/
}

writeFifoSpyFE()

void FEB_v1::writeFifoSpyFE

(

int

fe

)

Definition at line 266 of file FEB_v1.cpp.

References m_fifo, m_fifoSpyAddress, m_seqPga, setSpyModeFE(), SeqPGA::spiWrite(), and testDuration().

Referenced by BOOST_PYTHON_MODULE(), and extTrig().

                                  {
  setSpyModeFE(fe, false);
  int depth = testDuration(fe);
  for (int d=0; d<depth; ++d){
    m_fifo[0][d]=d;
    m_fifo[1][d]=d;
    m_fifo[2][d]=d; 
  }
  m_seqPga->spiWrite( m_fifoSpyAddress[0], depth, m_fifo[0] );
  m_seqPga->spiWrite( m_fifoSpyAddress[1], depth, m_fifo[1] );
  m_seqPga->spiWrite( m_fifoSpyAddress[2], depth, m_fifo[2] );
  setSpyModeFE(fe, true);
}

Member Data Documentation

m_ch

int* FEB_v1::m_ch[4]

private

Definition at line 190 of file FEB_v1.h.

Referenced by FEB_v1(), readFifoInjectFE(), readFifoLLTFE(), and readFifoSpyFE().

m_data

Data* FEB_v1::m_data

private

Definition at line 191 of file FEB_v1.h.

Referenced by data(), FEB_v1(), readFifoLLT(), readFifoLLTFE(), and readFifoSpyFE().

m_feAddress

int FEB_v1::m_feAddress[8]

private

Definition at line 181 of file FEB_v1.h.

Referenced by calibCte(), clockFallingEdge(), clockPhaseEport(), disableSubtract(), FEB_v1(), gain4(), globalPseudoPMEnable(), injectModeFE(), latency(), latencyEport(), oldSubtract(), probeEnable(), pseudoADCEnable(), pseudoPMEnable(), readFifoInjectFE(), readFifoLLTFE(), readFifoSpyFE(), resetFE(), resetFifoInjectFE(), resetFifoSpyFE(), setCalibCte(), setClockFallingEdge(), setDisableSubtract(), setGain4(), setGlobalPseudoPMEnable(), setInjectModeFE(), setLatency(), setOldSubtract(), setOutputEport(), setProbeEnable(), setPseudoADCEnable(), setPseudoPMEnable(), setSpareForTrigEnable(), setSpyModeFE(), setStopInjLoop(), setTestDuration(), setThreshold(), spareForTrigEnable(), spyModeFE(), statusRegister(), stopInjLoop(), testDuration(), threshold(), writeDataFifoInjectFE(), and writeFifoInjectFE().

m_fifo

unsigned int* FEB_v1::m_fifo[3]

private

Definition at line 189 of file FEB_v1.h.

Referenced by FEB_v1(), readFifoInjectFE(), readFifoLLT(), readFifoLLTFE(), readFifoSpyFE(), writeDataFifoInjectFE(), writeFifoLLT(), and writeFifoSpyFE().

m_fifoDepth

int FEB_v1::m_fifoDepth

private

Definition at line 179 of file FEB_v1.h.

Referenced by FEB_v1(), readFifo(), and testDuration().

m_fifoInjectAddress

int FEB_v1::m_fifoInjectAddress[3]

private

Definition at line 186 of file FEB_v1.h.

Referenced by FEB_v1(), readFifoInjectFE(), writeDataFifoInjectFE(), and writeFifoInjectFE().

m_fifoLLTAddress

int FEB_v1::m_fifoLLTAddress[3]

private

Definition at line 185 of file FEB_v1.h.

Referenced by FEB_v1(), and readFifoLLTFE().

m_fifoSpyAddress

int FEB_v1::m_fifoSpyAddress[3]

private

Definition at line 184 of file FEB_v1.h.

Referenced by FEB_v1(), readFifoSpyFE(), and writeFifoSpyFE().

m_fifoTrigAddress

int FEB_v1::m_fifoTrigAddress[3]

private

Definition at line 187 of file FEB_v1.h.

Referenced by FEB_v1(), readFifoLLT(), and writeFifoLLT().

m_fifoUsbTest

RAM* FEB_v1::m_fifoUsbTest

private

Definition at line 201 of file FEB_v1.h.

Referenced by FEB_v1().

m_gbtAddress

int FEB_v1::m_gbtAddress[4]

private

Definition at line 182 of file FEB_v1.h.

Referenced by FEB_v1(), gbt80MHzClkEport(), gbtAcknowledgeConfig(), gbtClockStrength(), gbtDataPath(), gbtDLLEport(), gbtDLLReset(), gbtEnableEport(), gbtMode(), gbtStatus(), gbtTermEport(), gbtTrackMode(), setGbt80MHzClkEport(), setGbtClockStrength(), setGbtDataPath(), setGbtDLLEport(), setGbtEnableEport(), setGbtMode(), setGbtTermEport(), and setGbtTrackMode().

m_icecalAddress

int FEB_v1::m_icecalAddress[8]

private

Definition at line 183 of file FEB_v1.h.

Referenced by FEB_v1().

m_latency0

int FEB_v1::m_latency0

private

Definition at line 195 of file FEB_v1.h.

Referenced by latencyLLT(), and setLatencyLLT().

m_latency1

int FEB_v1::m_latency1

private

Definition at line 196 of file FEB_v1.h.

Referenced by latencyLLT(), and setLatencyLLTUpNb().

m_latency2

int FEB_v1::m_latency2

private

Definition at line 197 of file FEB_v1.h.

Referenced by latencyLLT(), and setLatencyLLTSideNb().

m_latency3

int FEB_v1::m_latency3

private

Definition at line 198 of file FEB_v1.h.

Referenced by latencyLLT(), and setLatencyLLTCorner().

m_mask0

int FEB_v1::m_mask0

private

Definition at line 192 of file FEB_v1.h.

Referenced by maskLLT(), and setMaskLLT().

m_mask1

int FEB_v1::m_mask1

private

Definition at line 193 of file FEB_v1.h.

Referenced by maskLLT(), and setMaskLLT().

m_mask2

int FEB_v1::m_mask2

private

Definition at line 194 of file FEB_v1.h.

Referenced by maskLLT(), setMaskLLTCorner(), setMaskLLTSideNb(), and setMaskLLTUpNb().

m_ramInj

RAM* FEB_v1::m_ramInj[3]

private

Definition at line 199 of file FEB_v1.h.

Referenced by FEB_v1(), and ramInj().

m_ramSpy

RAM* FEB_v1::m_ramSpy[3]

private

Definition at line 200 of file FEB_v1.h.

Referenced by FEB_v1(), and ramSpy().

m_seqAddress

int FEB_v1::m_seqAddress

private

Definition at line 180 of file FEB_v1.h.

Referenced by clock80MHzFallingEdge(), clockPhaseEport(), enableBXIDReset(), FEB_v1(), latencyEport(), latencyLLT(), maskLLT(), readFifoLLT(), setClock80MHzFallingEdge(), setEnableBXIDReset(), setLatencyLLT(), setLatencyLLTCorner(), setLatencyLLTSideNb(), setLatencyLLTUpNb(), setMaskLLT(), setMaskLLTCorner(), setMaskLLTSideNb(), setMaskLLTUpNb(), setOutputEport(), setSpyModeSeq(), setStopInjLoop(), setTestDuration(), spyModeSeq(), stopInjLoop(), testDuration(), and writeFifoLLT().

m_seqPga

SeqPGA* FEB_v1::m_seqPga

private

Definition at line 188 of file FEB_v1.h.

Referenced by calibCte(), clock80MHzFallingEdge(), clockFallingEdge(), clockPhaseEport(), disableSubtract(), enableBXIDReset(), extTrig(), FEB_v1(), gain4(), gbt80MHzClkEport(), gbtAcknowledgeConfig(), gbtClockStrength(), gbtDataPath(), gbtDLLEport(), gbtDLLReset(), gbtEnableEport(), gbtMode(), gbtStatus(), gbtTermEport(), gbtTrackMode(), globalPseudoPMEnable(), injectModeFE(), latency(), latencyEport(), latencyLLT(), maskLLT(), oldSubtract(), probeEnable(), pseudoADCEnable(), pseudoPMEnable(), readFifo(), readFifoInjectFE(), readFifoLLT(), readFifoLLTFE(), readFifoSpyFE(), reset(), resetFE(), resetFifoInjectFE(), resetFifoSpyFE(), resetSpi(), seqPga(), setCalibCte(), setClock80MHzFallingEdge(), setClockFallingEdge(), setDisableSubtract(), setEnableBXIDReset(), setExtTrig(), setGain4(), setGbt80MHzClkEport(), setGbtClockStrength(), setGbtDataPath(), setGbtDLLEport(), setGbtEnableEport(), setGbtMode(), setGbtTermEport(), setGbtTrackMode(), setGlobalPseudoPMEnable(), setInjectModeFE(), setLatency(), setLatencyLLT(), setLatencyLLTCorner(), setLatencyLLTSideNb(), setLatencyLLTUpNb(), setMaskLLT(), setMaskLLTCorner(), setMaskLLTSideNb(), setMaskLLTUpNb(), setOldSubtract(), setOutputEport(), setProbeEnable(), setPseudoADCEnable(), setPseudoPMEnable(), setSpareForTrigEnable(), setSpyModeFE(), setSpyModeSeq(), setStopInjLoop(), setTestDuration(), setThreshold(), spareForTrigEnable(), spyModeFE(), spyModeSeq(), statusRegister(), stopInjLoop(), testDuration(), testSequence(), threshold(), writeDataFifoInjectFE(), writeFifoInjectFE(), writeFifoLLT(), and writeFifoSpyFE().

---

The documentation for this class was generated from the following files:

• /home/eleclhcb/LHCb/lbcat-cmake/CatCaloUpgrade/inc/FEB_v1.h
• /home/eleclhcb/LHCb/lbcat-cmake/CatCaloUpgrade/src/FEB_v1.cpp