Cat
Functions
Python.cpp File Reference
#include <vector>
#include <list>
#include "Processus.h"
#include "Element.h"
#include "FEB_v1.h"
#include "CU_v1.h"
#include "SeqPGA.h"
#include "FePGA.h"
#include "UsbFTMLInterface.h"
#include "UsbMLSpiBus.h"
#include "UsbMLI2cBus.h"
#include "ICPhaser.h"
#include "TestUSB.h"
#include "TestSPI.h"
#include "TestI2C.h"
#include "Acquisition.h"
#include <boost/python.hpp>
#include <boost/python/suite/indexing/vector_indexing_suite.hpp>

Go to the source code of this file.

Functions

 BOOST_PYTHON_MODULE (libCatCaloUpgrade)
 

Function Documentation

◆ BOOST_PYTHON_MODULE()

BOOST_PYTHON_MODULE ( libCatCaloUpgrade  )

Definition at line 26 of file Python.cpp.

References SeqPGA::addI2cReg(), ICPhaser::address(), FEB_v1::calibCte(), FEB_v1::clock80MHzFallingEdge(), FEB_v1::clockFallingEdge(), FEB_v1::clockPhaseEport(), UsbFTMLInterface::close(), FEB_v1::data(), UsbFTMLInterface::deviceDesc(), FEB_v1::disableSubtract(), FEB_v1::enableBXIDReset(), SeqPGA::extTrig(), FEB_v1::extTrig(), CU_v1::fePga(), FEB_v1::gain4(), FEB_v1::gbt80MHzClkEport(), FEB_v1::gbtAcknowledgeConfig(), FEB_v1::gbtClockStrength(), FEB_v1::gbtDataPath(), FEB_v1::gbtDLLEport(), FEB_v1::gbtDLLReset(), FEB_v1::gbtEnableEport(), FEB_v1::gbtMode(), FEB_v1::gbtStatus(), FEB_v1::gbtTermEport(), FEB_v1::gbtTrackMode(), FEB_v1::globalPseudoPMEnable(), FePGA::i2c(), SeqPGA::i2c(), SeqPGA::i2cAdd(), SeqPGA::i2cBuffer(), SeqPGA::i2cData(), SeqPGA::i2cGBTSCA(), SeqPGA::i2cRead(), SeqPGA::i2cSubAdd(), SeqPGA::i2cWrite(), UsbFTMLInterface::init(), FEB_v1::injectModeFE(), FEB_v1::latency(), FEB_v1::latencyEport(), FEB_v1::latencyLLT(), UsbFTMLInterface::latencyTimer(), SeqPGA::ledEnable(), FEB_v1::maskLLT(), SeqPGA::masterI2cReg(), FEB_v1::oldSubtract(), FEB_v1::probeEnable(), FEB_v1::pseudoADCEnable(), FEB_v1::pseudoPMEnable(), UsbFTMLInterface::purgeBuffers(), FEB_v1::ramInj(), FEB_v1::ramSpy(), ICPhaser::read(), UsbFTMLInterface::read(), CU_v1::readFifo(), FEB_v1::readFifoInjectFE(), FEB_v1::readFifoLLT(), FEB_v1::readFifoLLTFE(), FEB_v1::readFifoSpyFE(), SeqPGA::reg(), ICPhaser::regConfig(), ICPhaser::regStatus(), ICPhaser::reset(), FEB_v1::resetFE(), FEB_v1::resetFifoInjectFE(), FEB_v1::resetFifoSpyFE(), UsbFTMLInterface::resetMode(), FEB_v1::resetSpi(), UsbFTMLInterface::rxBuffer(), UsbFTMLInterface::rxTimeOut(), FEB_v1::seqPga(), UsbFTMLInterface::serialNum(), TestSPI::setAddress(), TestI2C::setAddress(), ICPhaser::setAddress(), UsbFTMLInterface::setBuffer(), FEB_v1::setCalibCte(), FEB_v1::setClock80MHzFallingEdge(), FEB_v1::setClockFallingEdge(), Acquisition::setDepth(), UsbFTMLInterface::setDeviceDesc(), FEB_v1::setDisableSubtract(), FEB_v1::setEnableBXIDReset(), SeqPGA::setExtTrig(), FEB_v1::setExtTrig(), FEB_v1::setGain4(), FEB_v1::setGbt80MHzClkEport(), FEB_v1::setGbtClockStrength(), FEB_v1::setGbtDataPath(), FEB_v1::setGbtDLLEport(), FEB_v1::setGbtEnableEport(), FEB_v1::setGbtMode(), FEB_v1::setGbtTermEport(), FEB_v1::setGbtTrackMode(), FEB_v1::setGlobalPseudoPMEnable(), SeqPGA::setI2cAdd(), SeqPGA::setI2cBuffer(), SeqPGA::setI2cGBTSCA(), SeqPGA::setI2cSubAdd(), FEB_v1::setInjectModeFE(), FEB_v1::setLatency(), FEB_v1::setLatencyLLT(), FEB_v1::setLatencyLLTCorner(), FEB_v1::setLatencyLLTSideNb(), FEB_v1::setLatencyLLTUpNb(), UsbFTMLInterface::setLatencyTimer(), SeqPGA::setLedEnable(), FEB_v1::setMaskLLT(), FEB_v1::setMaskLLTCorner(), FEB_v1::setMaskLLTSideNb(), FEB_v1::setMaskLLTUpNb(), FEB_v1::setOldSubtract(), FEB_v1::setOutputEport(), ICPhaser::setPhase(), FEB_v1::setProbeEnable(), FEB_v1::setPseudoADCEnable(), FEB_v1::setPseudoPMEnable(), UsbFTMLInterface::setSerialNum(), FEB_v1::setSpareForTrigEnable(), FePGA::setSpiAdd(), SeqPGA::setSpiAdd(), SeqPGA::setSpiEnable(), SeqPGA::setSpiGBTSCA(), FePGA::setSpiGBTSCA(), SeqPGA::setSpiSubAdd(), FEB_v1::setSpyModeFE(), FEB_v1::setSpyModeSeq(), FEB_v1::setStopInjLoop(), TestSPI::setSubAddress(), TestI2C::setSubAddress(), UsbFTMLInterface::setSynchronousMode(), FEB_v1::setTestDuration(), FEB_v1::setThreshold(), UsbFTMLInterface::setTimeOut(), Acquisition::setTrigger(), SeqPGA::setupReg(), FePGA::setupReg(), UsbFTMLInterface::setWordSize(), FEB_v1::spareForTrigEnable(), FePGA::spi(), SeqPGA::spi(), SeqPGA::spiAdd(), SeqPGA::spiEnable(), SeqPGA::spiGBTSCA(), FePGA::spiRead(), SeqPGA::spiRead(), SeqPGA::spiSubAdd(), FePGA::spiWrite(), SeqPGA::spiWrite(), FEB_v1::spyModeFE(), FEB_v1::spyModeSeq(), ICPhaser::status(), FEB_v1::statusRegister(), FEB_v1::stopInjLoop(), FEB_v1::testDuration(), SeqPGA::testSequence(), FEB_v1::testSequence(), FEB_v1::threshold(), UsbFTMLInterface::txBuffer(), UsbFTMLInterface::txTimeOut(), FePGA::usb(), SeqPGA::usb(), UsbFTMLInterface::wordSize(), ICPhaser::write(), UsbFTMLInterface::write(), FEB_v1::writeDataFifoInjectFE(), FEB_v1::writeFifoInjectFE(), FEB_v1::writeFifoLLT(), FEB_v1::writeFifoLLTFE(), FEB_v1::writeFifoSpyFE(), UsbFTMLInterface::WS_Byte, UsbFTMLInterface::WS_DWord, and UsbFTMLInterface::WS_Word.

27 {
28 
29 
30  StatusCode (FEB_v1::*setOutputEport1)(int, int, int, int) = (&FEB_v1::setOutputEport);
31  StatusCode (FEB_v1::*setOutputEport2)(int, int, int) = (&FEB_v1::setOutputEport);
32 
33  int (FEB_v1::*latencyEport1)(int, int) = (&FEB_v1::latencyEport);
34  int (FEB_v1::*latencyEport2)(int) = (&FEB_v1::latencyEport);
35 
36  int (FEB_v1::*clockPhaseEport1)(int, int) = (&FEB_v1::clockPhaseEport);
37  int (FEB_v1::*clockPhaseEport2)(int) = (&FEB_v1::clockPhaseEport);
38 
39  class_<FEB_v1, bases <Element> >("FEB_v1")
40  .def("seqPga" ,&FEB_v1::seqPga,return_value_policy<reference_existing_object>())
41  .def("ramInj" ,&FEB_v1::ramInj,return_value_policy<reference_existing_object>())
42  .def("ramSpy" ,&FEB_v1::ramSpy,return_value_policy<reference_existing_object>())
43 
44  .def("testSequence" ,&FEB_v1::testSequence)
45  .def("setExtTrig" ,&FEB_v1::setExtTrig)
46  .def("extTrig" ,&FEB_v1::extTrig)
47 
48  .def("readFifoSpyFE" ,&FEB_v1::readFifoSpyFE)
49  .def("readFifoLLTFE" ,&FEB_v1::readFifoLLTFE)
50  .def("readFifoLLT" ,&FEB_v1::readFifoLLT)
51  .def("readFifoInjectFE" ,&FEB_v1::readFifoInjectFE)
52  .def("writeFifoSpyFE" ,&FEB_v1::writeFifoSpyFE)
53  .def("writeFifoLLTFE" ,&FEB_v1::writeFifoLLTFE)
54  .def("writeFifoLLT" ,&FEB_v1::writeFifoLLT)
55  .def("writeFifoInjectFE",&FEB_v1::writeFifoInjectFE)
56  .def("writeDataFifoInjectFE",&FEB_v1::writeDataFifoInjectFE)
57 
58  .def("latencyLLT" ,&FEB_v1::latencyLLT)
59  .def("setLatencyLLT" ,&FEB_v1::setLatencyLLT)
60  .def("setLatencyLLTCorner" ,&FEB_v1::setLatencyLLTCorner)
61  .def("setLatencyLLTUpNb" ,&FEB_v1::setLatencyLLTUpNb)
62  .def("setLatencyLLTSideNb" ,&FEB_v1::setLatencyLLTSideNb)
63 
64  .def("maskLLT" ,&FEB_v1::maskLLT)
65  .def("setMaskLLT" ,&FEB_v1::setMaskLLT)
66  .def("setMaskLLTCorner" ,&FEB_v1::setMaskLLTCorner)
67  .def("setMaskLLTUpNb" ,&FEB_v1::setMaskLLTUpNb)
68  .def("setMaskLLTSideNb" ,&FEB_v1::setMaskLLTSideNb)
69 
70 
71  .def("resetFifoSpyFE" ,&FEB_v1::resetFifoSpyFE)
72  .def("resetFifoInjectFE" ,&FEB_v1::resetFifoInjectFE)
73  .def("resetSpi" ,&FEB_v1::resetSpi)
74  .def("resetFE" ,&FEB_v1::resetFE)
75 
76  .def("setSpareForTrigEnable" ,&FEB_v1::setSpareForTrigEnable)
77  .def("spareForTrigEnable" ,&FEB_v1::spareForTrigEnable)
78  .def("setProbeEnable" ,&FEB_v1::setProbeEnable)
79  .def("probeEnable" ,&FEB_v1::probeEnable)
80  .def("setTestDuration" ,&FEB_v1::setTestDuration)
81  .def("testDuration" ,&FEB_v1::testDuration)
82  .def("setStopInjLoop" ,&FEB_v1::setStopInjLoop)
83  .def("stopInjLoop" ,&FEB_v1::stopInjLoop)
84  .def("setSpyModeSeq" ,&FEB_v1::setSpyModeSeq)
85  .def("spyModeSeq" ,&FEB_v1::spyModeSeq)
86  .def("setSpyModeFE" ,&FEB_v1::setSpyModeFE)
87  .def("spyModeFE" ,&FEB_v1::spyModeFE)
88  .def("setSpyModeFE" ,&FEB_v1::setSpyModeFE)
89  .def("spyModeFE" ,&FEB_v1::spyModeFE)
90  .def("setDisableSubtract",&FEB_v1::setDisableSubtract)
91  .def("disableSubtract" ,&FEB_v1::disableSubtract)
92  .def("setOldSubtract" ,&FEB_v1::setOldSubtract)
93  .def("oldSubtract" ,&FEB_v1::oldSubtract)
94  .def("setThreshold" ,&FEB_v1::setThreshold)
95  .def("threshold" ,&FEB_v1::threshold)
96  .def("setLatency" ,&FEB_v1::setLatency)
97  .def("latency" ,&FEB_v1::latency)
98  .def("setSpyModeFE" ,&FEB_v1::setSpyModeFE)
99  .def("spyModeFE" ,&FEB_v1::spyModeFE)
100  .def("setSpyModeFE" ,&FEB_v1::setSpyModeFE)
101  .def("spyModeFE" ,&FEB_v1::spyModeFE)
102  .def("setInjectModeFE" ,&FEB_v1::setInjectModeFE)
103  .def("injectModeFE" ,&FEB_v1::injectModeFE)
104  .def("statusRegister" ,&FEB_v1::statusRegister)
105  .def("setEnableBXIDReset" ,&FEB_v1::setEnableBXIDReset)
106  .def("enableBXIDReset" ,&FEB_v1::enableBXIDReset)
107 
108  .def("setGain4" ,&FEB_v1::setGain4)
109  .def("setPseudoADCEnable" ,&FEB_v1::setPseudoADCEnable)
110  .def("setPseudoPMEnable" ,&FEB_v1::setPseudoPMEnable)
111  .def("setGlobalPseudoPMEnable" ,&FEB_v1::setGlobalPseudoPMEnable)
112  .def("setClockFallingEdge" ,&FEB_v1::setClockFallingEdge)
113  .def("setCalibCte" ,&FEB_v1::setCalibCte)
114  .def("gain4" ,&FEB_v1::gain4)
115  .def("pseudoADCEnable" ,&FEB_v1::pseudoADCEnable)
116  .def("pseudoPMEnable" ,&FEB_v1::pseudoPMEnable)
117  .def("globalPseudoPMEnable",&FEB_v1::globalPseudoPMEnable)
118  .def("setClockFallingEdge" ,&FEB_v1::setClockFallingEdge)
119  .def("clockFallingEdge" ,&FEB_v1::clockFallingEdge)
120  .def("setClock80MHzFallingEdge" ,&FEB_v1::setClock80MHzFallingEdge)
121  .def("clock80MHzFallingEdge" ,&FEB_v1::clock80MHzFallingEdge)
122  .def("setCalibCte" ,&FEB_v1::setCalibCte)
123  .def("calibCte" ,&FEB_v1::calibCte)
124 
125  .def("setGbtMode" ,&FEB_v1::setGbtMode)
126  .def("gbtMode" ,&FEB_v1::gbtMode)
127  .def("setGbtDataPath" ,&FEB_v1::setGbtDataPath)
128  .def("gbtDataPath" ,&FEB_v1::gbtDataPath)
129  .def("setGbtTrackMode" ,&FEB_v1::setGbtTrackMode)
130  .def("gbtTrackMode" ,&FEB_v1::gbtTrackMode)
131  .def("setGbtTermEport" ,&FEB_v1::setGbtTermEport)
132  .def("gbtTermEport" ,&FEB_v1::gbtTermEport)
133  .def("setGbt80MHzClkEport" ,&FEB_v1::setGbt80MHzClkEport)
134  .def("gbt80MHzClkEport" ,&FEB_v1::gbt80MHzClkEport)
135  .def("setGbtDLLEport" ,&FEB_v1::setGbtDLLEport)
136  .def("gbtDLLEport" ,&FEB_v1::gbtDLLEport)
137  .def("setGbtEnableEport" ,&FEB_v1::setGbtEnableEport)
138  .def("gbtEnableEport" ,&FEB_v1::gbtEnableEport)
139  .def("setGbtClockStrength" ,&FEB_v1::setGbtClockStrength)
140  .def("gbtClockStrength" ,&FEB_v1::gbtClockStrength)
141  .def("gbtStatus" ,&FEB_v1::gbtStatus)
142  .def("gbtDLLReset" ,&FEB_v1::gbtDLLReset)
143  .def("gbtAcknowledgeConfig",&FEB_v1::gbtAcknowledgeConfig)
144 
145  .def("setOutputEport" ,setOutputEport1)
146  .def("latencyEport" ,latencyEport1)
147  .def("clockPhaseEport" ,clockPhaseEport1)
148 
149  .def("setOutputEport" ,setOutputEport2)
150  .def("latencyEport" ,latencyEport2)
151  .def("clockPhaseEport" ,clockPhaseEport2)
152 
153  .def("data",&FEB_v1::data,return_value_policy<reference_existing_object>())
154  ;
155 
156  StatusCode (SeqPGA::*spiwrite_1)(unsigned int, unsigned int) = (&SeqPGA::spiWrite);
157  StatusCode (SeqPGA::*spiwrite_2)(unsigned int, unsigned int, PyObject*) = (&SeqPGA::spiWrite);
158 
159  unsigned int (SeqPGA::*spiread_1)(unsigned int) = (&SeqPGA::spiRead);
160  PyObject* (SeqPGA::*spiread_2)(unsigned int, unsigned int) = (&SeqPGA::spiRead);
161 
162  StatusCode (SeqPGA::*i2cwrite_1)() = (&SeqPGA::i2cWrite);
163  StatusCode (SeqPGA::*i2cwrite_2)(unsigned long int, unsigned long int) = (&SeqPGA::i2cWrite);
164  StatusCode (SeqPGA::*i2cread_1)() = (&SeqPGA::i2cRead);
165  unsigned long int (SeqPGA::*i2cread_2)(unsigned long int) = (&SeqPGA::i2cRead);
166 
167  class_<SeqPGA, bases <Element> >("SeqPGA")
168  .def("usb",&SeqPGA::usb,return_value_policy<reference_existing_object>())
169  .def("spi",&SeqPGA::spi,return_value_policy<reference_existing_object>())
170  .def("i2c",&SeqPGA::i2c,return_value_policy<reference_existing_object>())
171  .def("reg",&SeqPGA::reg,return_value_policy<reference_existing_object>())
172 
173  .def("setupReg",&SeqPGA::setupReg,return_value_policy<reference_existing_object>())
174 
175  .def("testSequence" ,&SeqPGA::testSequence)
176  .def("setExtTrig" ,&SeqPGA::setExtTrig)
177  .def("extTrig" ,&SeqPGA::extTrig)
178 
179 
180  .def("setSpiGBTSCA" ,&SeqPGA::setSpiGBTSCA)
181  .def("spiGBTSCA" ,&SeqPGA::spiGBTSCA)
182  .def("setSpiEnable" ,&SeqPGA::setSpiEnable)
183  .def("spiEnable" ,&SeqPGA::spiEnable)
184  .def("setLedEnable" ,&SeqPGA::setLedEnable)
185  .def("ledEnable" ,&SeqPGA::ledEnable)
186  // .def("setSpiDataTx" ,&SeqPGA::setSpiDataTx)
187  // .def("spiDataTx" ,&SeqPGA::spiDataTx)
188  // .def("setSpiDataRx" ,&SeqPGA::setSpiDataRx)
189  // .def("spiDataRx" ,&SeqPGA::spiDataRx)
190  .def("setSpiAdd" ,&SeqPGA::setSpiAdd)
191  .def("spiAdd" ,&SeqPGA::spiAdd)
192  .def("setSpiSubAdd" ,&SeqPGA::setSpiSubAdd)
193  .def("spiSubAdd" ,&SeqPGA::spiSubAdd)
194  .def("spiWrite" ,spiwrite_1)
195  .def("spiWrite" ,spiwrite_2)
196  .def("spiRead" ,spiread_1)
197  .def("spiRead" ,spiread_2)
198 
199  .def("addI2cReg" ,&SeqPGA::addI2cReg,return_value_policy<reference_existing_object>())
200  .def("masterI2cReg",&SeqPGA::masterI2cReg,return_value_policy<reference_existing_object>())
201 
202  .def("setI2cGBTSCA" ,&SeqPGA::setI2cGBTSCA)
203  .def("i2cGBTSCA" ,&SeqPGA::i2cGBTSCA)
204  .def("setI2cBuffer" ,&SeqPGA::setI2cBuffer)
205  .def("buffer" ,&SeqPGA::i2cBuffer)
206  .def("i2cData" ,&SeqPGA::i2cData)
207  .def("setI2cAdd" ,&SeqPGA::setI2cAdd)
208  .def("i2cAdd" ,&SeqPGA::i2cAdd)
209  .def("setI2cSubAdd" ,&SeqPGA::setI2cSubAdd)
210  .def("i2cSubAdd" ,&SeqPGA::i2cSubAdd)
211  .def("i2cWrite" ,i2cwrite_1)
212  .def("i2cWrite" ,i2cwrite_2)
213  .def("i2cRead" ,i2cread_1)
214  .def("i2cRead" ,i2cread_2)
215  ;
216 
217  class_<CU_v1, bases <Element> >("CU_v1")
218  .def("fePga" ,&CU_v1::fePga,return_value_policy<reference_existing_object>())
219  .def("readFifo" ,&CU_v1::readFifo)
220 
221  ;
222 
223  StatusCode (FePGA::*spiwrite_3)(unsigned int, unsigned int) = (&FePGA::spiWrite);
224  StatusCode (FePGA::*spiwrite_4)(unsigned int, unsigned int, PyObject*) = (&FePGA::spiWrite);
225 
226  unsigned int (FePGA::*spiread_3)(unsigned int) = (&FePGA::spiRead);
227  PyObject* (FePGA::*spiread_4)(unsigned int, unsigned int) = (&FePGA::spiRead);
228 
229 
230  class_<FePGA, bases <Element> >("FePGA")
231  .def("usb",&FePGA::usb,return_value_policy<reference_existing_object>())
232  .def("spi",&FePGA::spi,return_value_policy<reference_existing_object>())
233  .def("i2c",&FePGA::i2c,return_value_policy<reference_existing_object>())
234  //.def("reg",&FePGA::reg,return_value_policy<reference_existing_object>())
235  .def("setupReg",&FePGA::setupReg,return_value_policy<reference_existing_object>())
236  // .def("testSequence" ,&FePGA::testSequence)
237  // .def("setExtTrig" ,&FePGA::setExtTrig)
238  // .def("extTrig" ,&FePGA::extTrig)
239  .def("setSpiGBTSCA" ,&FePGA::setSpiGBTSCA)
240  // .def("spiGBTSCA" ,&FePGA::spiGBTSCA)
241  .def("setSpiAdd" ,&FePGA::setSpiAdd)
242  // .def("spiAdd" ,&FePGA::spiAdd)
243  // .def("setSpiSubAdd" ,&FePGA::setSpiSubAdd)
244  // .def("spiSubAdd" ,&FePGA::spiSubAdd)
245  .def("spiWrite" ,spiwrite_3)
246  .def("spiWrite" ,spiwrite_4)
247 
248  .def("spiRead" ,spiread_3) //This is needed by readfifo
249  .def("spiRead" ,spiread_4)
250  // .def("addI2cReg" ,&FePGA::addI2cReg,return_value_policy<reference_existing_object>())
251  //.def("masterI2cReg",&FePGA::masterI2cReg,return_value_policy<reference_existing_object>())
252  // .def("setI2cGBTSCA" ,&FePGA::setI2cGBTSCA)
253  // .def("i2cGBTSCA" ,&FePGA::i2cGBTSCA)
254  // .def("setI2cBuffer" ,&FePGA::setI2cBuffer)
255  // .def("buffer" ,&FePGA::i2cBuffer)
256  // .def("i2cData" ,&FePGA::i2cData)
257  // .def("setI2cAdd" ,&FePGA::setI2cAdd)
258  // .def("i2cAdd" ,&FePGA::i2cAdd)
259  // .def("setI2cSubAdd" ,&FePGA::setI2cSubAdd)
260  // .def("i2cSubAdd" ,&FePGA::i2cSubAdd)
261  // .def("i2cWrite" ,i2cwrite_1)
262  // .def("i2cWrite" ,i2cwrite_2)
263  // .def("i2cRead" ,i2cread_1)
264  // .def("i2cRead" ,i2cread_2)
265  ;
266 
267 
268  enum_<UsbFTMLInterface::WordSize>("WordSize")
269  .value("U8", UsbFTMLInterface::WS_Byte)
270  .value("U16", UsbFTMLInterface::WS_Word)
271  .value("U32", UsbFTMLInterface::WS_DWord)
272  ;
273 
274  StatusCode (UsbFTMLInterface::*write_1)(unsigned long int, boost::python::list) = (&UsbFTMLInterface::write);
275  StatusCode (UsbFTMLInterface::*write_2)(IOdata*) = (&UsbFTMLInterface::write);
276  StatusCode (UsbFTMLInterface::*read_1)(unsigned long int,unsigned long int, boost::python::list&) = (&UsbFTMLInterface::read);
277  StatusCode (UsbFTMLInterface::*read_2)(IOdata*) = (&UsbFTMLInterface::read);
278 
279  class_<UsbFTMLInterface, bases <Element> > ("UsbFTMLInterface")
280  .def("init" ,&UsbFTMLInterface::init)
281  .def("setSerialNum" ,&UsbFTMLInterface::setSerialNum)
282  .def("setDeviceDesc" ,&UsbFTMLInterface::setDeviceDesc)
283  .def("serialNum" ,&UsbFTMLInterface::serialNum)
284  .def("deviceDesc" ,&UsbFTMLInterface::deviceDesc)
285  .def("setWordSize" ,&UsbFTMLInterface::setWordSize)
286  .def("wordSize" ,&UsbFTMLInterface::wordSize)
287  .def("close" ,&UsbFTMLInterface::close)
288  .def("setLatencyTimer",&UsbFTMLInterface::setLatencyTimer)
289  .def("latencyTimer" ,&UsbFTMLInterface::latencyTimer)
290  .def("setTimeOut" ,&UsbFTMLInterface::setTimeOut)
291  .def("txTimeOut" ,&UsbFTMLInterface::txTimeOut)
292  .def("rxTimeOut" ,&UsbFTMLInterface::rxTimeOut)
293  .def("setBuffer" ,&UsbFTMLInterface::setBuffer)
294  .def("txBuffer" ,&UsbFTMLInterface::txBuffer)
295  .def("rxBuffer" ,&UsbFTMLInterface::rxBuffer)
296  .def("resetMode" ,&UsbFTMLInterface::resetMode)
297  .def("purgeBuffers" ,&UsbFTMLInterface::purgeBuffers)
298  .def("setSynchronousMode",&UsbFTMLInterface::setSynchronousMode)
299  .def("write" ,write_1)
300  .def("write" ,write_2)
301  .def("read" ,read_1)
302  .def("read" ,read_2)
303  ;
304 
305  class_<UsbMLSpiBus, bases <Element> >("UsbMLSpiBus")
306  ;
307 
308  class_<UsbMLI2cBus, bases <Element> >("UsbMLI2cBus")
309  ;
310 
311  void (ICPhaser::*setPhasex2)(unsigned char, unsigned char) = (&ICPhaser::setPhase);
312  void (ICPhaser::*setPhasex4)(unsigned char, unsigned char,
313  unsigned char, unsigned char) = (&ICPhaser::setPhase);
314 
315  class_<ICPhaser, bases <Element> >("ICPhaser")
316  .def("setPhase",setPhasex2)
317  .def("setPhase",setPhasex4)
318  .def("setAddress",&ICPhaser::setAddress)
319  .def("address",&ICPhaser::address)
320  .def("status",&ICPhaser::status)
321  .def("reset",&ICPhaser::reset)
322  .def("read" ,&ICPhaser::read)
323  .def("write",&ICPhaser::write)
324  .def("regConfig" ,&ICPhaser::regConfig,
325  return_value_policy<reference_existing_object>())
326  .def("regStatus" ,&ICPhaser::regStatus,
327  return_value_policy<reference_existing_object>())
328  ;
329 
330  // class_<TestUSB, bases<Processus> > ("TestUSB")
331  // ;
332 
333  class_<TestSPI, bases<Processus> > ("TestSPI")
334  .def("setAddress", &TestSPI::setAddress)
335  .def("setSubAddress", &TestSPI::setSubAddress)
336  ;
337 
338  class_<TestI2C, bases<Processus> > ("TestI2C")
339  .def("setAddress", &TestI2C::setAddress)
340  .def("setSubAddress", &TestI2C::setSubAddress)
341  ;
342 
343  class_<Acquisition, bases<Processus> > ("Acquisition")
344  .def("setDepth" , &Acquisition::setDepth)
345  .def("setTrigger", &Acquisition::setTrigger)
346  ;
347 
348 }
FEB_v1::setThreshold
StatusCode setThreshold(int, int)
Definition: FEB_v1.cpp:695
FEB_v1::gbtEnableEport
bool gbtEnableEport(int)
Definition: FEB_v1.cpp:1515
FEB_v1::setGbtTermEport
StatusCode setGbtTermEport(int, bool)
Definition: FEB_v1.cpp:1284
FEB_v1::readFifoLLTFE
void readFifoLLTFE(int fe, int dump)
Definition: FEB_v1.cpp:160
FEB_v1::testSequence
StatusCode testSequence()
Definition: FEB_v1.h:108
UsbFTMLInterface::setSerialNum
void setSerialNum(std::string serialNum)
Definition: UsbFTMLInterface.h:249
FEB_v1::setLatencyLLTUpNb
StatusCode setLatencyLLTUpNb(int)
Definition: FEB_v1.cpp:1042
ICPhaser::reset
void reset()
Definition: ICPhaser.cpp:49
FEB_v1::setTestDuration
StatusCode setTestDuration(int)
Definition: FEB_v1.cpp:511
ICPhaser::read
void read()
Definition: ICPhaser.cpp:16
FEB_v1::setMaskLLTCorner
StatusCode setMaskLLTCorner(bool)
Definition: FEB_v1.cpp:1141
SeqPGA::setExtTrig
StatusCode setExtTrig(bool)
Definition: SeqPGA.cpp:142
FEB_v1::writeFifoSpyFE
void writeFifoSpyFE(int fe)
Definition: FEB_v1.cpp:266
FEB_v1::setSpyModeSeq
StatusCode setSpyModeSeq(bool)
Definition: FEB_v1.cpp:653
ICPhaser::status
void status()
Definition: ICPhaser.cpp:38
FEB_v1::oldSubtract
bool oldSubtract(int)
Definition: FEB_v1.cpp:795
FEB_v1::latencyEport
int latencyEport(int)
Definition: FEB_v1.cpp:1580
FEB_v1::resetFifoSpyFE
StatusCode resetFifoSpyFE(int)
Definition: FEB_v1.cpp:471
FEB_v1::ramInj
RAM * ramInj(int i)
Definition: FEB_v1.h:148
UsbFTMLInterface::setDeviceDesc
void setDeviceDesc(std::string deviceDesc)
Definition: UsbFTMLInterface.h:265
SeqPGA::reg
Register * reg()
Definition: SeqPGA.h:87
FEB_v1::gbtStatus
int gbtStatus(int)
Definition: FEB_v1.cpp:1640
FEB_v1::setPseudoADCEnable
StatusCode setPseudoADCEnable(int, int, bool)
Definition: FEB_v1.cpp:856
TestSPI::setSubAddress
void setSubAddress(int)
Definition: TestSPI.cpp:88
FePGA::setSpiAdd
StatusCode setSpiAdd(unsigned long int)
Definition: FePGA.cpp:77
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bool clock80MHzFallingEdge()
Definition: FEB_v1.cpp:971
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UsbMLSpiBus * spi()
Definition: FePGA.h:82
FEB_v1::disableSubtract
bool disableSubtract(int)
Definition: FEB_v1.cpp:754
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StatusCode setI2cBuffer(unsigned long int)
Definition: SeqPGA.cpp:460
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std::string serialNum()
Definition: UsbFTMLInterface.h:257
FEB_v1::gbtTrackMode
int gbtTrackMode(int)
Definition: FEB_v1.cpp:1268
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void setAddress(int)
Definition: TestI2C.cpp:85
FEB_v1::gbtTermEport
bool gbtTermEport(int)
Definition: FEB_v1.cpp:1322
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Definition: FEB_v1.cpp:1542
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unsigned long wordSize()
Definition: UsbFTMLInterface.h:394
FEB_v1::setGbtEnableEport
StatusCode setGbtEnableEport(int, bool)
Definition: FEB_v1.cpp:1491
FEB_v1::setExtTrig
StatusCode setExtTrig(bool trig)
Definition: FEB_v1.h:110
FEB_v1::gbtAcknowledgeConfig
StatusCode gbtAcknowledgeConfig(int)
Definition: FEB_v1.cpp:1656
SeqPGA::setSpiAdd
StatusCode setSpiAdd(unsigned long int)
Definition: SeqPGA.cpp:255
FEB_v1::writeFifoLLT
void writeFifoLLT()
Definition: FEB_v1.cpp:283
FEB_v1::setMaskLLTSideNb
StatusCode setMaskLLTSideNb(int, bool)
Definition: FEB_v1.cpp:1169
SeqPGA::spiEnable
bool spiEnable()
Definition: SeqPGA.cpp:197
FEB_v1::maskLLT
void maskLLT()
Definition: FEB_v1.cpp:1091
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void setAddress(U8 address)
Definition: ICPhaser.h:127
UsbFTMLInterface::setLatencyTimer
void setLatencyTimer(unsigned char latencyTimer)
Definition: UsbFTMLInterface.h:281
UsbFTMLInterface::read
StatusCode read(IOdata *)
Definition: UsbFTMLInterface.cpp:739
SeqPGA::setSpiEnable
StatusCode setSpiEnable(bool)
Definition: SeqPGA.cpp:188
FePGA
Definition: FePGA.h:23
FEB_v1::readFifoLLT
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Definition: FEB_v1.cpp:200
FEB_v1::latencyLLT
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Definition: FEB_v1.cpp:1009
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bool ledEnable()
Definition: SeqPGA.cpp:215
FEB_v1::threshold
int threshold(int)
Definition: FEB_v1.cpp:708
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Definition: ICPhaser.cpp:60
FEB_v1::statusRegister
int statusRegister(int)
Definition: FEB_v1.cpp:501
SeqPGA::testSequence
StatusCode testSequence()
Definition: SeqPGA.h:96
Acquisition::setTrigger
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Definition: Acquisition.h:36
SeqPGA::setLedEnable
StatusCode setLedEnable(bool)
Definition: SeqPGA.cpp:206
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std::string deviceDesc()
Definition: UsbFTMLInterface.h:273
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Definition: FEB_v1.cpp:818
FEB_v1::spyModeSeq
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Definition: FEB_v1.cpp:661
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Definition: UsbFTMLInterface.h:299
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Definition: FEB_v1.cpp:829
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Definition: UsbFTMLInterface.cpp:795
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bool extTrig()
Definition: SeqPGA.cpp:151
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UsbMLSpiBus * spi()
Definition: SeqPGA.h:83
SeqPGA::masterI2cReg
Register * masterI2cReg()
Definition: SeqPGA.h:93
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Definition: UsbFTMLInterface.h:327
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Definition: FEB_v1.cpp:1338
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Definition: FEB_v1.cpp:922
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Definition: SeqPGA.cpp:442
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Definition: FEB_v1.h:111
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Definition: FEB_v1.cpp:783
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Definition: ICPhaser.h:58
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Definition: SeqPGA.cpp:278
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Definition: FEB_v1.cpp:537
FEB_v1::setGbtClockStrength
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Definition: FEB_v1.cpp:1528
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Definition: SeqPGA.h:79
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Definition: FEB_v1.cpp:731
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UsbMLI2cBus * i2c()
Definition: FePGA.h:78
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Definition: FEB_v1.cpp:765
SeqPGA::i2cRead
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Definition: SeqPGA.cpp:510
FEB_v1
Definition: FEB_v1.h:21
SeqPGA::setI2cAdd
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Definition: SeqPGA.cpp:482
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Definition: FEB_v1.h:151
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Register * regConfig()
Definition: ICPhaser.h:119
FEB_v1::resetSpi
void resetSpi()
Definition: FEB_v1.h:53
FEB_v1::setSpareForTrigEnable
StatusCode setSpareForTrigEnable(int, int)
Definition: FEB_v1.cpp:631
FEB_v1::setInjectModeFE
StatusCode setInjectModeFE(int, bool)
Definition: FEB_v1.cpp:806
FEB_v1::spyModeFE
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Definition: FEB_v1.cpp:684
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Definition: FEB_v1.cpp:773
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Definition: SeqPGA.h:94
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Definition: FEB_v1.cpp:949
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Definition: FEB_v1.cpp:1390
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Definition: FEB_v1.cpp:481
FEB_v1::writeFifoLLTFE
void writeFifoLLTFE(int fe)
Definition: FEB_v1.cpp:444
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Definition: SeqPGA.cpp:451
IOdata
Definition: IOdata.h:17
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Definition: UsbFTMLInterface.cpp:47
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Definition: SeqPGA.cpp:502
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Definition: SeqPGA.cpp:321
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Definition: FEB_v1.cpp:959
FEB_v1::writeDataFifoInjectFE
void writeDataFifoInjectFE(int, int *, int *, int *, int *)
Definition: FEB_v1.cpp:426
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Definition: FEB_v1.cpp:1564
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Definition: CU_v1.cpp:64
FEB_v1::gbtMode
int gbtMode(int)
Definition: FEB_v1.cpp:1202
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Definition: FePGA.cpp:102
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Definition: FEB_v1.cpp:899
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Definition: UsbFTMLInterface.h:386
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unsigned long int i2cData()
Definition: SeqPGA.cpp:473
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StatusCode setProbeEnable(int, bool)
Definition: FEB_v1.cpp:603
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UsbFTMLInterface * usb()
Definition: SeqPGA.h:75
TestSPI::setAddress
void setAddress(int)
Definition: TestSPI.cpp:84
FEB_v1::setGbtTrackMode
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Definition: FEB_v1.cpp:1252
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unsigned char latencyTimer()
Definition: UsbFTMLInterface.h:290
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Definition: FEB_v1.cpp:1115
FEB_v1::setGbtMode
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Definition: FEB_v1.cpp:1184
FEB_v1::setPseudoPMEnable
StatusCode setPseudoPMEnable(int, int, bool)
Definition: FEB_v1.cpp:883
FEB_v1::readFifoSpyFE
void readFifoSpyFE(int fe, int dump)
Definition: FEB_v1.cpp:121
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Definition: SeqPGA.cpp:535
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Definition: SeqPGA.cpp:263
SeqPGA::setupReg
Register * setupReg()
Definition: SeqPGA.h:91
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Definition: FEB_v1.cpp:1058
FEB_v1::seqPga
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Definition: FEB_v1.h:63
SeqPGA::spiSubAdd
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Definition: SeqPGA.cpp:282
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Definition: FEB_v1.cpp:584
FEB_v1::data
Data * data()
Definition: FEB_v1.h:147
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StatusCode spiWrite(unsigned int, unsigned int, unsigned int *)
Definition: FePGA.cpp:84
FEB_v1::setGlobalPseudoPMEnable
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Definition: FEB_v1.cpp:910
FEB_v1::setLatencyLLTCorner
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Definition: FEB_v1.cpp:1074
FEB_v1::setCalibCte
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Definition: FEB_v1.cpp:982
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Definition: TestI2C.cpp:89
FEB_v1::readFifoInjectFE
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Definition: FEB_v1.cpp:236
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Definition: FEB_v1.cpp:719
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Definition: FePGA.h:74
FEB_v1::setDisableSubtract
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Definition: FEB_v1.cpp:742
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int clockPhaseEport(int)
Definition: FEB_v1.cpp:1575
FEB_v1::gbtDLLReset
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Definition: FEB_v1.cpp:1614
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Definition: ICPhaser.h:133
FEB_v1::pseudoADCEnable
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Definition: FEB_v1.cpp:872
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Definition: FEB_v1.cpp:1220
FEB_v1::setMaskLLTUpNb
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Definition: FEB_v1.cpp:1155
FEB_v1::probeEnable
void probeEnable()
Definition: FEB_v1.cpp:620
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Definition: SeqPGA.cpp:497
SeqPGA::spiRead
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Definition: SeqPGA.cpp:337
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Definition: FEB_v1.cpp:845
FEB_v1::setClockFallingEdge
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Definition: FEB_v1.cpp:933
FEB_v1::setSpyModeFE
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Definition: FEB_v1.cpp:672
SeqPGA
Definition: SeqPGA.h:23
ICPhaser::regStatus
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Definition: ICPhaser.h:123
FEB_v1::gbt80MHzClkEport
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Definition: FEB_v1.cpp:1373
FEB_v1::spareForTrigEnable
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Definition: FEB_v1.cpp:642
SeqPGA::spiGBTSCA
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Definition: SeqPGA.cpp:174
FEB_v1::calibCte
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Definition: FEB_v1.cpp:998
FePGA::setSpiGBTSCA
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Definition: FePGA.cpp:211
FEB_v1::setLatencyLLT
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Definition: FEB_v1.cpp:1026
Acquisition::setDepth
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Definition: Acquisition.cpp:202
FEB_v1::gbtDataPath
int gbtDataPath(int)
Definition: FEB_v1.cpp:1239
FEB_v1::writeFifoInjectFE
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Definition: FEB_v1.cpp:298
FEB_v1::gbtDLLEport
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Definition: FEB_v1.cpp:1467
FEB_v1::resetFE
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Definition: FEB_v1.cpp:491
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Register * setupReg()
Definition: FePGA.h:97
SeqPGA::i2cBuffer
unsigned long int i2cBuffer()
Definition: SeqPGA.cpp:465
SeqPGA::i2cAdd
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Definition: SeqPGA.cpp:488
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Definition: SeqPGA.cpp:165
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Definition: CU_v1.h:56
FEB_v1::setStopInjLoop
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Definition: FEB_v1.cpp:558
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